instruction_memory.v

Use the verilog language write a MIPS CPU code, and have additional instruction, for example: select

//=============================================================================
//Instruction memory Module: Memory size is 167 words of 8 bits ( 1 bite ) each
//	input [31:0] Read_address;
//	output [31:0] instruction;
//=============================================================================

module Instruction_memory( Read_address, instruction );
	input [31:0] Read_address;	//read address
	output [31:0] instruction;	//read data
	reg [31:0] instruction;
	reg [7:0] Mem [0:169];	//167 * 8 memory

	always @( Read_address )	
		begin
			instruction[31:0] = {Mem[Read_address+3],Mem[Read_address+2],Mem[Read_address+1],Mem[Read_address]};
		end

endmodule