代码搜索结果

/********************************************************************************************************* ** All right reserve 2008-2009(C) **

/* Gollstt.vhd -- State machine to implement handshake between two unsynchronized pseudo-random -- sequence generators. Using this handshake technique, one of the sequence generators -- can be imp

module gollman( clk,reset,ena,data,done);//,iena),enab,enac,enad ); parameter keya = 7'b1011011; //1st LFR key parameter keyb = 4'b1001; //2nd LFR key parameter keyc = 3'b011; //3rd LFR key para

module gollman( clk,reset,ena,data,done,iena);//,enab,enac,enad ); parameter keya = 7'b1011011; //1st LFR key parameter keyb = 4'b1001; //2nd LFR key parameter keyc = 3'b011; //3rd LFR key param

/* Gollstt.vhd -- State machine to implement handshake between two unsynchronized pseudo-random -- sequence generators. Using this handshake technique, one of the sequence generators -- can be imp

module div16(clk,rst,clk_16); input clk,rst; output clk_16; reg[3:0] count; always @(posedge clk or negedge rst) begin if (!rst) count

module countersel(D_IN,D_OUT1,D_OUT0); output D_OUT1; output D_OUT0; input [1:0] D_IN; reg D_OUT1; reg D_OUT0; always begin case(D_IN) 2'b00 : {D_OUT1,D_OUT0}

module dispmux(SEL,D_IN1,D_IN0,D_OUT); output [3:0] D_OUT; input [3:0] D_IN1; input [3:0] D_IN0; input [1:0] SEL; reg [3:0] D_OUT; always begin case(SEL) 2'b01 : D_OUT

module trafficlight( Reset, SW, CLK, Red1, Red2, Yellow1, Yellow2, Green1, Green2, SEG_Data, SEG_Sel ); input Reset; input SW; input CLK; output Red1; output Red2; outpu

module dispselect(CLK,D_OUT); output [1:0] D_OUT; input CLK; reg [1:0] D_OUT; always @(posedge CLK) begin if(D_OUT < 2'b10) D_OUT