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kernel-Mode

  • Current Mode Modelling,国外大牛写的电源控制仿真模型

    国外大牛写的电源控制仿真模型,讲解很详细。

    标签: 电源控制仿真模型

    上传时间: 2021-11-03

    上传用户:kent

  • stm32L0 RTC配置与代码

    基于cubeMX的stm32L0系列单片机RTC配置及相关寄存器配置代码,可用于低功耗模式下(stop mode)对单片机进行唤醒,无需外部唤醒源,只需配置RTC的内部唤醒功能即可实现,代码亲测可用。

    标签: stm32l0 rtc

    上传时间: 2021-11-16

    上传用户:

  • USB_MICRO USB_MNI USB扁口座 TF卡槽 SOIC8 LQFP32芯片ALTIU

    USB_MICRO USB_MNI  USB扁口座 TF卡槽 SOIC8 LQFP32芯片ALTIUM 库(3D PCB封装库), 3D封装,已在项目中使用,可以做为你的设计参考。详细列表如下:Component Count : 94Component Name-----------------------------------------------32165032-8MHZAMS1117ANT2AntennaBATbuzzerCapCAP-0805CAP-3216CD32Crystal Oscillator 3225HC-06KEY-2PINLED-0603LQFP-100LQFP32LQFP44LQFP44 10X10_LLQFP44 10X10_MLQFP44 10X10_NLQFP48LQFP48 7X7_LLQFP48 7X7_MLQFP48 7X7_NLQFP64 10x10_LLQFP64 10x10_MLQFP64 10x10_NMagMOTONRF24L01NRF24L01-modeOLED-0.96-PIN7QFN20_4X4QFN24_4X4QFN32_5X5remoteRES-0603RFX2401CRPSG90SH1.0mm-4PINSH1.0MM-5PINSH1.0mm-6PINSMA-ANTSMA/DO-214SOIC-8SOP16SOT-23-3SOT-23-5SOT-89SOT-223SPL06-001STM32F030C8T6STM32F030F4P6STM32F103C8T6straight-1x2pinstraight-1x2pin - duplicatestraight-1x2pin - duplicate1straight-1x3pinstraight-1x3pin - duplicatestraight-1x3pin - duplicate1straight-1x4pinstraight-1x4pin - duplicatestraight-1x5pinstraight-1x8pinstraight-1x8pin - duplicatestraight-2x2pinstraight-2x3pinstraight-2x4pinstraight-2x5pinSW-NO/OFF-PIN3SW-SMD1SW-SMD2SWITCH-DIP-6*6*7SX1308TF-CARDTO-263-5TP4056USBUSB_MICROUSB_MNI_BUSB-MICRO-1winding_1x2pinwinding_1x3pinwinding_1x4pinwinding_1x5pinwinding_1x8pinwinding_2x2pinwinding_2x3pinwinding_2x4pinwinding_2x5pinXTAL-5070/SMDXTAL-QC49/SMD

    标签: usb

    上传时间: 2021-12-02

    上传用户:aben

  • NCP1399 电流模式控制器 手册

    NCP1399 是高性能电流模式控制器,半桥谐 变换器。此控制器实现 600 V 门驱动、 简化布 局和减少外部组件计数 。built - in 和 Brown - Out  输入函数简化了执行在所有应用程序的控制器。 在 PFC 前阶段的应用 NCP1399 需要设有专用的 输出驱动 PFC 前级控制器。此功能专用 skip-mode 技术进一步提高轻负载效率的整个应 用程序。 NCP1399 提供全套的保护功能允许安全 运行在任何应用程序中。这包括:过载保护,过 流保护以防止硬开关周期, brown- out 检测,打 开光电耦合器检测, 死区自动调整, 过电压(OVP) 和 (OTP) 过温保护

    标签: ncp1399 电流模式控制器

    上传时间: 2021-12-17

    上传用户:qingfengchizhu

  • HI3520DV400全套资料(Cadence arregro原理图+PCB+bom+镜像软件)

    HI3520DV400全套资料(Cadence arregro原理图+PCB+bom+镜像软件),1个HDMI输入,1个HDMI输出,1个3.5音频输入,1个3.5音频输出。2GB-DDR3,2个USB2.0,1个LAN,已经调试通过,固件都已经打包好。拿来就可以打板生产,包括原理图,PCB,u-boot,kernel,rootfs。

    标签: hi3520dv400 cadence arregro

    上传时间: 2021-12-28

    上传用户:

  • DDR4标准 JESD79_4

    1. Scope ......................................................................................................................................................................... 12. DDR4 SDRAM Package Pinout and Addressing ....................................................................................................... 22.1 DDR4 SDRAM Row for X4,X8 and X16 ................................................................................................................22.2 DDR4 SDRAM Ball Pitch........................................................................................................................................22.3 DDR4 SDRAM Columns for X4,X8 and X16 ..........................................................................................................22.4 DDR4 SDRAM X4/8 Ballout using MO-207......................................................................................................... 22.5 DDR4 SDRAM X16 Ballout using MO-207.............................................................................................................32.6 Pinout Description ..................................................................................................................................................52.7 DDR4 SDRAM Addressing.....................................................................................................................................73. Functional Description ...............................................................................................................................................83.1 Simplified State Diagram ....................................................................................................................................83.2 Basic Functionality..................................................................................................................................................93.3 RESET and Initialization Procedure .....................................................................................................................103.3.1 Power-up Initialization Sequence .............................................................................................................103.3.2 Reset Initialization with Stable Power ......................................................................................................113.4 Register Definition ................................................................................................................................................123.4.1 Programming the mode registers .............................................................................................................123.5 Mode Register ......................................................................................................................................................134. DDR4 SDRAM Command Description and Operation ............................................................................................. 244.1 Command Truth Table ..........................................................................................................................................244.2 CKE Truth Table ...................................................................................................................................................254.3 Burst Length, Type and Order ..............................................................................................................................264.3.1 BL8 Burst order with CRC Enabled .........................................................................................................264.4 DLL-off Mode & DLL on/off Switching procedure ................................................................................................274.4.1 DLL on/off switching procedure ...............................................................................................................274.4.2 DLL “on” to DLL “off” Procedure ..............................................................................................................274.4.3 DLL “off” to DLL “on” Procedure ..............................................................................................................284.5 DLL-off Mode........................................................................................................................................................294.6 Input Clock Frequency Change ............................................................................................................................304.7 Write Leveling.......................................................................................................................................................314.7.1 DRAM setting for write leveling & DRAM termination function in that mode ............................................324.7.2 Procedure Description .............................................................................................................................334.7.3 Write Leveling Mode Exit .........................................................................................................................34

    标签: DDR4

    上传时间: 2022-01-09

    上传用户:

  • 瑞芯微RK3399 软件件设计资料 RK3399 Linux Debian软件开发文档资料

    瑞芯微RK3399 软件件设计资料 RK3399 Linux Debian软件开发文档资料,SDK 是基于 Linux 64bit 系统,内核基于 kernel 4.40,适用于 RK3399 挖掘机以及基于其 上所有 linux 开发产品。 支持 VPU 硬解码、GPU 3D、QT 等功能。具体功能调试和接口说明

    标签: rk3399 linux

    上传时间: 2022-01-29

    上传用户:

  • 瑞芯微RK3399 软硬件资料包括3款硬件Cadence原理图PCB文件 硬件设计文档 LINIU

    瑞芯微RK3399 软硬件资料包括3款硬件Cadence原理图PCB文件,硬件设计文档,LINIUX软件开发文档i资料硬件文档主要介绍RK3399处理器硬件设计的要点及注意事项,旨在帮助RK客户缩短产品的设计周期、提高产品的设计稳定性及降低故障率。请客户参考本指南的要求进行硬件设计,同时尽量使用RK发布的相关核心模板。 SDK 是基于 Linux 64bit 系统,内核基于 kernel 4.40,适用于 RK3399 挖掘机以及基于其 上所有 linux 开发产品。 支持 VPU 硬解码、GPU 3D、QT 等功能。具体功能调试和接口说明,请阅读工程目录 docs/目录下文档。

    标签: rk3399 软硬件 cadence pcb

    上传时间: 2022-01-29

    上传用户:

  • STM32L053C8T6数据手册

    STM32L053C8T6数据手册Features • Ultra-low-power platform – 1.65 V to 3.6 V power supply – -40 to 125 °C temperature range – 0.27 µA Standby mode (2 wakeup pins) – 0.4 µA Stop mode (16 wakeup lines) – 0.8 µA Stop mode + RTC + 8 KB RAM retention – 139 µA/MHz Run mode at 32 MHz – 3.5 µs wakeup time (from RAM) – 5 µs wakeup time (from Flash) • Core: ARM® 32-bit Cortex®-M0+ with MPU – From 32 kHz up to 32 MHz max.  – 0.95 DMIPS/MHz • Reset and supply management – Ultra-safe, low-power BOR (brownout reset)  with 5 selectable thresholds – Ultralow power POR/PDR – Programmable voltage detector (PVD) • Clock sources – 1 to 25 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – High speed internal 16 MHz factory-trimmed RC  (+/- 1%) – Internal low-power 37 kHz RC – Internal multispeed low-power 65 kHz to  4.2 MHz RC – PLL for CPU clock • Pre-programmed bootloader – USART, SPI supported • Development support – Serial wire debug supported • Up to 51 fast I/Os (45 I/Os 5V tolerant) • Memories – Up to 64 KB Flash with ECC – 8KB RAM – 2 KB of data EEPROM with ECC – 20-byte backup register

    标签: stm32l053c8t6

    上传时间: 2022-02-06

    上传用户:

  • PW5300_2.0.pdf规格书下载

    The PW5300 is a current mode boost DC-DC converter. Its PWM circuitry with built-in 0.2Ω powerMOSFET make this regulator highly power efficient. The internal compensation network alsominimizes as much as 6 external component counts. The non-inverting input of error amplifierconnects to a 0.6V precision reference voltage and internal soft-start function can reduce the inrushcurrent. The PW5300 is available in the SOT23-6L package and provides space-saving PCB for theapplication fields

    标签: pw5300

    上传时间: 2022-02-11

    上传用户:jiabin