·SystemVerilog is a rich set of extensions to the IEEE 1364-2001 Verilog Hardware Description Language (Verilog HDL). These extensions address two major aspects of HDL-based design. First, modeling ver
标签： nbsp SystemVerilog Design for
上传时间： 2013-07-14
上传用户：ainimao
在PC机上运行cadence需要先运行命令:source filename,此处filename指.cshrc,或其他具有该文件内容但名字不同的文件,该文件必须有set DISPLAY 本机IP:0.0 语句,同时应将其他雷同设置封住.可以先从工作站上下载.cshrc文件,然后用notepad修改显示设置相,不可用其他编辑器,否则文本文件格式会不一样.记住,必须将显示器设置为256色.
上传时间： 2013-09-05
上传用户：超凡大师
15.2 已經加入了有關貫孔及銲點的Z軸延遲計算功能. 先開啟 Setup - Constraints - Electrical constraint sets 下的 DRC 選項. 點選 Electrical Constraints dialog box 下 Options 頁面 勾選 Z-Axis delay栏.
上传时间： 2013-10-08
上传用户：王庆才
Abstract: Alexander Graham Bell patented twisted pair wires in 1881. We still use them today because they work so well. In addition we have the advantage ofincredible computer power within our world. Circuit simulators and filter design programs are available for little or no cost. We combine the twisted pair and lowpassfilters to produce spectacular rejection of radio frequency interference (RFI) and electromagnetic interference (EMI). We also illustrate use of a precision resistorarray to produce a customizable differential amplifier. The precision resistors set the gain and common mode rejection ratios, while we choose the frequencyresponse.
上传时间： 2014-11-26
上传用户：Vici
Abstract: Using a DAC and a microprocessor supervisor, the system safety can be improved in industrial controllers, programmablelogiccontrollers (PLC), and data-acquisition systems. The analog output is set to zero-scale (or pin-programmable midscale) when amicroprocessor failure, optocoupler failure, or undervoltage condition occurs. A simple application is shown on how to implement thisfunction.
上传时间： 2013-10-17
上传用户：sjb555
This unique guide to designing digital VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of digital design, using the physics that designers need to know, and no more.Covering system and component aspects, design verification, VHDL modelling, clocking, signalintegrity, layout, electricaloverstress, field-programmable logic, economic issues, and more, thescope of the book is singularly comprehensive.
标签： Integrated Digital Circuit Design
上传时间： 2013-11-04
上传用户：life840315
比例控制(P)是一种最简单的控制方式。其控制器的输出与输入误差信号成比例关系。根据设备有所不同，比例带一般为2～10％(温度控制)。但是，仅仅是P 控制的话，会产生下面将提到的off set (稳态误差)，所以一般加上积分控制(I)，以消除稳态误差。
上传时间： 2014-07-21
上传用户：frank1234
Portable, battery-powered operation of electronic apparatushas become increasingly desirable. Medical, remotedata acquisition, power monitoring and other applicationsare good candidates for battery operation. In some circumstances,due to space, power or reliability considerations,it is preferable to operate the circuitry from a single 1.5Vcell. Unfortunately, a 1.5V supply eliminates almost alllinear ICs as design candidates. In fact, the LM10 opamp-reference and the LT®1017/LT1018 comparators arethe only IC gain blocks fully specifi ed for 1.5V operation.Further complications are presented by the 600mV dropof silicon transistors and diodes. This limitation consumesa substantial portion of available supply range, makingcircuit design diffi cult. Additionally, any circuit designedfor 1.5V operation must function at end-of-life batteryvoltage, typically 1.3V. (See Box Section, “Componentsfor 1.5V Operation.”)
标签： Circuitry Operation Single 1017
上传时间： 2013-12-20
上传用户：Wwill
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上传时间： 2013-11-12
上传用户：pans0ul
第一步，拿到一块PCB，首先在纸上记录好所有元气件的型号，参数，以及位置，尤其是二极管，三极管的方向，IC缺口的方向。最好用数码相机拍两张元气件位置的照片。 第二步，拆掉所有器件，并且将PAD孔里的锡去掉。用酒精将PCB清洗干净，然后放入扫描仪内，启动POHTOSHOP，用彩色方式将丝印面扫入，并打印出来备用。 第三步，用水纱纸将TOP LAYER 和BOTTOM LAYER两层轻微打磨，打磨到铜膜发亮，放入扫描仪，启动PHOTOSHOP，用彩色方式将两层分别扫入。注意，PCB在扫描仪内摆放一定要横平树直，否则扫描的图象就无法使用，扫描仪分辨率请选为600。 需要的朋友请下载哦！
上传时间： 2013-11-17
上传用户：zhuimenghuadie
