ModelSim注册license解码解码
上传时间: 2014-01-07
上传用户:wpwpwlxwlx
ModelSim DDR2 SDRAM files
上传时间: 2013-12-23
上传用户:chenjjer
it is a verilog code written for MAX1886 ADC interin ModelSim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
标签: synthesize simulator ModelSim interin
上传时间: 2017-03-22
上传用户:洛木卓
it is a verilog code written for digital watch in ModelSim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
标签: synthesize simulator ModelSim digital
上传时间: 2014-01-10
上传用户:kernaling
it is a verilog code written for FIFO in ModelSim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
标签: synthesize simulator ModelSim verilog
上传时间: 2014-06-26
上传用户:zhuyibin
典型实例13SDRAM读写控制的实现与ModelSim仿真
上传时间: 2014-01-25
上传用户:jyycc
ModelSim study notes
上传时间: 2013-12-22
上传用户:youke111
软件开发环境:ISE 7.1i 仿真环境:ModelSim SE 6.0 1. 梁祝乐曲演奏电路
上传时间: 2014-01-27
上传用户:comua
软件开发环境:ISE 7.1i 仿真环境:ModelSim SE 6.0 1. 多功能数字钟
上传时间: 2014-01-03
上传用户:youlongjian0
软件开发环境:ISE 7.1i 仿真环境:ModelSim SE 6.0 1. 自动售饮机 电话计费器程序
上传时间: 2017-05-03
上传用户:trepb001