modelsim.ini

来自「I try 4-bit comparator here in VHDL」· INI 代码 · 共 12 行

[Library]
others = $MODEL_TECH/../modelsim.ini
proasic3 = C:/Libero/Designer/lib/modelsim/precompiled/vhdl/proasic3
syncad_vhdl_lib = C:\Libero\Designer/lib/actel/syncad_vhdl_lib

presynth = presynth
[vcom]
VHDL93 = 1

[vsim]
IterationLimit = 5000