中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design Suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-21
上传用户：wxqman
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上传时间： 2013-11-21
上传用户：不懂夜的黑
目录•FPGA调试的挑战•传统的FPGA调试方案•Agilent FPGA动态探头的调试方案•总结
上传时间： 2013-11-24
上传用户：zhangyi99104144
为实现低噪声放大器增益压缩特性的自动测量，提出了一种基于LabVIEW仪器控制实现的自动化测量系统设计方案，并完成了系统的软硬件设计。该系统的硬件部分由Agilent E4438C信号发生器、Agilent E4419B功率计以及GPIB总线和接口卡构成；软件部分使用LabVIEW图形化的编程语言设计开发了信号发生器和功率计的自动化控制程序，实现了两个设备之间的协同工作。该系统除了可以自动配置仪器工作参数、读取并显示测量结果外，还增加了数据记录和后期处理模块，可以同步显示测试数据和测试曲线，这大大扩展了原有仪器的测试功能。实验表明，该系统具有测量准确、自动化、节约时间、使用方便等特点。
上传时间： 2015-01-02
上传用户：bensonlly
软件使用指南 Multisim是一种适用于板级电子电路仿真和设计的EDA工具软件，是加拿大Interactive Image Technologies公司（简称IIT公司）电子线路仿真软件EWB（Electronics workbench）的升级版。Multisim 7是IIT公司2003年推出的最新版本。
上传时间： 2013-11-09
上传用户：ca05991270
安捷伦3000系列示波器资料
上传时间： 2013-10-12
上传用户：trepb001
要进行ps级时间测量，首先需要示波器的带宽和采样率不能太低，否则信号失真会带来测量误差。Agilent 的90000 系列示波器可以提供13GHz 的带宽以及40G/s的采样率，采样点的间隔可以达到25ps，再通过插值，单一通道的时间测量精度可以<5ps，初步提供了精确测量的可行性。
上传时间： 2013-11-05
上传用户：alibabamama
英文书籍，Introduction.to.Mobile.Telephone.Systems.1G.2G.2.5G.and.3G.Wireless.Technologies.and.Services
上传时间： 2015-02-25
上传用户：hoperingcong
The practice of enterprise application development has benefited from the emergence of many new enabling technologies. Multi-tiered object-oriented platforms, such as Java and .NET, have become commonplace.
标签： application development enterprise benefited
上传时间： 2015-03-11
上传用户：aig85
为Delphi2005做了改动 DSPack 2.3.3 (Sep 2004). DSPack is a set of Components and class to write Multimedia Applications using MS Direct Show and DirectX technologies. DSPack is designed to work with DirectX 9 on Win9X, ME, 2000, and Windows XP operating systems. Now VMR (Video Mixing Renderer) is available on all Windows Operating Systems. DSPack 2 is designed to work with Delphi 5,6,7 and CPP Builder 6.
标签： DSPack Components Multimedia Delphi
上传时间： 2014-01-22
上传用户：hzy5825468
