代码搜索:testbench
找到约 2,392 项符合「testbench」的源代码
代码结果 2,392
www.eeworm.com/read/39713/1134964
100vhdl+
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
use work.types.all;
architecture BENCH of test_prefetch is
component prefetch
PORT(
BR
www.eeworm.com/read/487718/1234983
vhd 56_stim.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
use work.types.all;
architecture BENCH of test_prefetch is
component prefetch
PORT(
BR
www.eeworm.com/read/456726/1602630
vhd 56_stim.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
use work.types.all;
architecture BENCH of test_prefetch is
component prefetch
PORT(
BR
www.eeworm.com/read/310565/3695592
vhd 56_stim.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
use work.types.all;
architecture BENCH of test_prefetch is
component prefetch
PORT(
BR
www.eeworm.com/read/439207/1807103
vhd 56_stim.vhd
-- Author : yzf
-- Created On: Tue Dec 12 08:26:19 1995
-- Testbench for prefetch.prefetch
use work.types.all;
architecture BENCH of test_prefetch is
component prefetch
PORT(
BR
www.eeworm.com/read/368409/9696999
tf adder8_for_tb.tf
module testbench();
// Inputs
reg [7:0] a;
reg [7:0] b;
reg cin;
// Outputs
wire [7:0] sum;
wire cout;
// Instantiate the UUT
adder8_for uut (.sum(sum), .c
www.eeworm.com/read/368409/9697012
tf shl4_for_tb.tf
module testbench();
// Inputs
reg CLK;
reg RESET;
reg Din;
// Outputs
wire [3:0] Q;
// Instantiate the UUT
shl4_for uut (.Q(Q), .CLK(CLK), .RESET(RESET), .Din(D
www.eeworm.com/read/368409/9697054
tf repeat_tb.tf
module testbench();
reg [7:0] Din; // Inputs
wire [3:0] ones;// Outputs
repeat_1s uut (.ones(ones), .Din(Din));// Instantiate the UUT
// Initialize Inputs
initial
$monitor ($time,
www.eeworm.com/read/134149/14003703
vhd vga_and_clut_tstbench.vhd
--
-- file: vga_and_clut_tstbench.vhd
-- project: VGA/LCD controller + Color Lookup Table
-- author: Richard Herveille
--
-- Testbench for VGA controller + CLUT combination
--
-- rev 1.0 July 4th, 200
www.eeworm.com/read/290161/8500919
vhd polynome_pkg.vhd
--
-- VHDL Package Header testbench_lib.polynome
--
-- Created:
-- by - Yihua.Zhang.UNKNOWN (CV0009649D2)
-- at - 13:41:17 2006-06- 6
--
-- using Mentor Graphics HDL Designer(