代码搜索：std

找到约 10,000 项符合「std」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
www.eeworm.com/read/442714/7646024

vhd cy7c166.vhd

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www.eeworm.com/read/442714/7646043

vhd cy7c109.vhd

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www.eeworm.com/read/442713/7646152

vhd cdc328a.vhd

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www.eeworm.com/read/442478/7650832

vhd leddongtai.vhd

LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.std_logic_unsigned.all; ENTITY leddongtai IS PORT ( clock :IN STD_LOGIC; --clock is 1KHZ flash : IN STD_LOGIC; ewh,ewl,snh,snl : IN
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vhd clk_div.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; ENTITY clk_div IS PORT(CLK:IN STD_LOGIC; clk_div3:OUT STD_LOGIC); END clk
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vhd shifter.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity shifter is port(clk:in std_logic; input :in std_logic_vector(2 downto 0); output :out std_l
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vhd shifter.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity shifter is port(clk:in std_logic; input :in std_logic_vector(2 downto 0); output :out std_l
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vhd clk_div.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity clk_div is port(clk : in std_logic; clk_div6 : out std_logic); end clk_div
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www.eeworm.com/read/441060/7676645

vhd rom.vhd

library ieee; use ieee.std_logic_1164.all; --use ieee.std_logic_arith; use ieee.std_logic_signed.all; use ieee.numeric_std.all; entity rom is port(address:in std_logic_vector(15 downto 0);
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txt ltc2624 .txt

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; ---- Uncomment the following library declaration if instantiating ---- any Xilinx primi
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