代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/447464/7550660
vhd bbfifo_16x8.vhd
-- 'Bucket Brigade' FIFO
-- 16 deep
-- 8-bit data
--
-- Version : 1.10
-- Version Date : 3rd December 2003
-- Reason : '--translate' directives changed to '--synthesis translate' directives
www.eeworm.com/read/447464/7550666
vhd bbfifo_16x9.vhd
-- 'Bucket Brigade' FIFO
-- 16 deep
-- 9-bit data
--
-- Version : 1.00 (derived from bbfifo_16x8 version 1.10)
-- Version Date : 10th February 2005
--
-- Ken Chapman
-- Xilinx Ltd
-- Benchm
www.eeworm.com/read/446921/7562847
vhd ls138.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY LS138 IS
PORT(G1,G2,A,B,C:IN STD_LOGIC;
Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7:OUT STD_LOGIC);
www.eeworm.com/read/445367/7596311
vhd tlv5636.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
---final freq 111.90HZ
ENTITY tlv5636 Is
Port(
ClkSystem : in STD_LOGIC; --输入
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vhd count_16.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY COUNT_16 IS
PORT(DISCLK:IN STD_LOGIC;
Q:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END COUNT_16;
ARCHITECTURE
www.eeworm.com/read/444248/7615765
tdf count_16.tdf
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY COUNT_16 IS
PORT(DISCLK:IN STD_LOGIC;
Q:OUT STD_LOGIC_VECTOR(3 DOWNTO 0));
END COUNT_16;
ARCHITECTURE
www.eeworm.com/read/443723/7624746
vhd memtest.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use WORK.common.all;
use WORK.rand.all;
package mem is
component memTest
generic(
DATA_WIDTH : natura
www.eeworm.com/read/443552/7630779
vhd ramb4_s8.vhd
-- megafunction wizard: %LPM_RAM_DQ%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: altsyncram
-- ============================================================
-- File Name: RAMB4_S8.vhd
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vhd v7_1.vhd
library ieee;
use ieee.std_logic_1164.all;
entity V7_1 is
port(a,b : in bit;
c : out std_logic);
end V7_1;
architecture a of V7_1 is
function bit2std(Inb : bit ) return
www.eeworm.com/read/443250/7635373
vhd v2_5.vhd
library ieee;
use ieee.std_logic_1164.all;
package Const is
constant Threshold : std_logic_vector(7 downto 0);
end Const;