代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/392688/8330025
vhd display.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity display is
port(clk : in std_logic;
light : in integer range 1 to 3;
www.eeworm.com/read/174496/9585735
vhd cannon.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity cannon is
Port ( clk : in std_logic;
reset : in std_logic;
www.eeworm.com/read/174496/9585820
vhd top.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity top is
Port ( sysclk : in std_logic;
reset1 : in std_logic;
www.eeworm.com/read/174467/9586318
vhd top.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity top is
Port ( sysclk : in std_logic;
reset1 : in std_logic;
www.eeworm.com/read/370579/9595054
vhd 加法器源程序.vhd
------------------------------------------------------------------------
-- Single-bit adder
------------------------------------------------------------------------
library IEEE;
use IEEE.std_log
www.eeworm.com/read/370579/9595056
txt 加法器描述.txt
-- A Variety of Adder Styles
-- download from: www.fpga.com.cn & www.pld.com.cn
------------------------------------------------------------------------
-- Single-bit adder
-----------------------
www.eeworm.com/read/370579/9595110
vhd 相应加法器的测试向量（test bench).vhd
-- download from: www.pld.com.cn & www.fpga.com.cn
entity testbench is
end;
------------------------------------------------------------------------
-- testbench for 8-bit adder
------------
www.eeworm.com/read/370408/9601304
vhd lcd.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity lcd is
Port ( clk : in std_logic; --4MHZ FROM D12
Reset
www.eeworm.com/read/370222/9608676
vhd operation_unit.vhd
-- ----------------------------------------------------------------------
-----------------------------------------------------------------------------
--Library definitions
----
library ieee;
www.eeworm.com/read/370032/9622325
vhd cufifo.vhd
library IEEE;
use IEEE.Std_logic_1164.all;
entity CuFIFO is
port(
rst, clk : in Std_logic;
wr, rd : in Std_logic; ---写信号，读信号
DataIn : in Std_logic_vector(7