代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/168634/5441348
vhd pcu.vhd
-- ************************************************************************
-- * NOVAS SOFTWARE CONFIDENTIAL PROPRIETARY NOTE *
-- *
www.eeworm.com/read/168634/5441353
vhd system.vhd
-- ************************************************************************
-- * NOVAS SOFTWARE CONFIDENTIAL PROPRIETARY NOTE *
-- *
www.eeworm.com/read/168399/5447256
vhd testbench_ac97_package.vhd
-------------------------------------------------------------------------------
-- $Id: TESTBENCH_ac97_package.vhd,v 1.1 2005/02/18 15:30:21 wirthlin Exp $
------------------------------------------
www.eeworm.com/read/160076/5576975
vhd ram2rw256xm.vhd
--************************************************************
--************************************************************
--*----------------------------------------------------------*
--*|Vers
www.eeworm.com/read/154101/5642050
vhd uc_interface.vhd
-- File: uC_interface.vhd
--
-- Author: Jennifer Jenkins
-- Philips Semiconductor
-- Purpose: Description of an interface with a ucontroller/uprocessor
-- (i.e. Motorola 68000)
www.eeworm.com/read/154079/5642646
vhd dcm_phase_shift.vhd
-------------------------------------------------------------------------------
-- Digital Clock Manager (DCM) --
-- DCM in Phase Shifter mode
www.eeworm.com/read/475629/6774795
vhd suocunf.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY suocunf IS
PORT(
IN2:IN STD_LOGIC_VECTOR(10 DOWNTO 0);
IN3:IN
www.eeworm.com/read/475629/6774814
vhd suocun.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY suocun IS
PORT(
IN2:IN STD_LOGIC_VECTOR(10 DOWNTO 0);
IN3:IN
www.eeworm.com/read/145234/6784004
vhd vga_main.vhd
---------------------------------------------------------------------
-- vga_main.vhd Demo VGA configuration module.
---------------------------------------------------------------------
-- Autho
www.eeworm.com/read/329989/6788350
vhd cannon.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity cannon is
Port ( clk : in std_logic;
reset : in std_logic;