suocunf.vhd

来自「基于vhdl的qpsk算法研究与性能测试」· VHDL 代码 · 共 32 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY suocunf IS
   PORT(
        IN2:IN STD_LOGIC_VECTOR(10 DOWNTO 0);
        IN3:IN STD_LOGIC_VECTOR(5 DOWNTO 0);
        CLK,LD:IN STD_LOGIC;
        ADDR1:OUT STD_LOGIC_VECTOR(5 DOWNTO 0);
        ADDR2:OUT STD_LOGIC_VECTOR(10 DOWNTO 0)
        );
END suocunf;
ARCHITECTURE  arcsu OF suocunf IS
SIGNAL SAV:STD_LOGIC_VECTOR(10 DOWNTO 0);
BEGIN
PROCESS(CLK)
BEGIN
IF (CLK'EVENT AND CLK='0') THEN
   IF (LD='0')  THEN
   SAV<=IN3&"00000";
   ELSE 
   SAV<=IN2;
   END IF;
END IF;
END PROCESS;
ADDR1<=SAV(10 downto 5);
ADDR2<=SAV;
END arcsu;