代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/214188/15111193
bak topglobal.bak
-- Top global: Nivel superior, encargado de la comunicacion entre
-- los dos subtops y de controlar los accesos de lectura y escritura
library IEEE;
use IEEE.std_logic_1164.all;
entity Topglobal
www.eeworm.com/read/214188/15111202
vhd topcom.vhd
--BLOQUE TOP DE LA COMUNICACI覰
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
entity topcom is
port (
P16: in STD_LOGIC
www.eeworm.com/read/214088/15113724
vhd scan.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity scan is
port(clk:in std_logic;
arst:in std_logic;
outscan:out std_logic_vector(2 downto 0)
);
end scan;
www.eeworm.com/read/213740/15126580
vhd clock24coms.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
PACKAGE clock24coms IS
COMPONENT jsq60
PORT(clk:IN STD_LOGIC;
en0,en1,cin:IN STD_LOGIC;
datain:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
www.eeworm.com/read/213479/15134175
vhd smg3.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity smg3 is
port(clk,rst: in std_logic;
myout:out std_logic_vector(6 downto 0);
cp:out std_logic_vector(5 downto 0)
www.eeworm.com/read/213084/15142987
vhw tb_hand_shake.vhw
--------------------------------------------------------------------------------
-- Copyright (c) 1995-2003 Xilinx, Inc.
-- All Right Reserved.
-----------------------------------------------------
www.eeworm.com/read/213084/15143004
vhd enableandstart.vhd
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 23:03:02 05/18/2006
-- Design Name:
-- Module Name: EnableAndS
www.eeworm.com/read/212909/15145372
vhd djdplj_top.vhd
--/* DJDPLJ_TOP．VHD*/--顶层模块
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations t
www.eeworm.com/read/212077/15166056
vhd cancomp.vhd
----------------------------------------------------------------------------
-- This file is a part of the GRLIB VHDL IP LIBRARY
-- Copyright (C) 2004 GAISLER RESEARCH
--
-- This program is free so
www.eeworm.com/read/212004/15168491
vhd pio_rtl.vhd
-------------------------------------------------------------------------------
-- --
-- CPU86 - VHDL CPU8088 IP core