代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
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vhd hdrs_test.vhd
-- VHDL Test Bench Created from source file headers.vhd -- 19:29:50 03/19/2004
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for
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vhi counter.vhi
-- VHDL Instantiation Created from source file counter.vhd -- 14:27:36 03/14/2004
--
-- Notes:
-- 1) This instantiation template has been automatically generated using types
-- std_logic and st
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vhi memreadmux.vhi
-- VHDL Instantiation Created from source file memreadmux.vhd -- 14:48:51 03/14/2004
--
-- Notes:
-- 1) This instantiation template has been automatically generated using types
-- std_logic and
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vhd counter.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity counter is
generic ( size : integer := 16);
Port (cop: IN std_logic_vecto
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vhd memtoplevel.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity memtoplevel is
Port (
CLK : IN std_logic;
Resetn : IN std_logic;
pp
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vhd vgatest.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity vgatest is
port
(
clock : in std_logic;
resetN : in std_logic;
rdn,
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vhd lzw_test.vhd
-- VHDL Test Bench Created from source file headers.vhd -- 19:29:50 03/19/2004
--
-- Notes:
-- This testbench has been automatically generated using types std_logic and
-- std_logic_vector for
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vhd headers_beh.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity headers_beh is
Port (
clk : in std_logic;
rstL : in std_logic;
sta
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vhd reg.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity reg is
Generic ( size : integer := 8 );
Port ( d : in std_logic_vector(size
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vhd vgamem.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity vgamem is
port
(
reset: in std_logic; -- reset
clock: in std_logic; -- VGA dot clock
hsyncb: buffer