memtoplevel.vhd

vhdl code for GIF Image Viewer

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity memtoplevel is
    Port (
		CLK : IN std_logic;
		Resetn : IN std_logic;
		ppdata : IN std_logic_vector(7 downto 0);    
		SRAMLeftData : INOUT std_logic_vector(15 downto 0);      
		CELeftn : OUT std_logic;
		OELeftn : OUT std_logic;
		WELeftn : OUT std_logic;
		SRAMLeftAddr : OUT std_logic_vector(18 downto 0);
		ppstatus : OUT std_logic_vector(6 downto 3)
	 );
end memtoplevel;

architecture Behavioral of memtoplevel is
	COMPONENT sraminterfacewithpport
	PORT(
		CLK : IN std_logic;
		Resetn : IN std_logic;
		doRead : IN std_logic;
		doWrite : IN std_logic;
		readAddr : IN std_logic_vector(18 downto 0);
		writeAddr : IN std_logic_vector(18 downto 0);
		writeData : IN std_logic_vector(15 downto 0);
		ppdata : IN std_logic_vector(7 downto 0);    
		SRAMLeftData : INOUT std_logic_vector(15 downto 0);      
		readData : OUT std_logic_vector(15 downto 0);
		canRead : OUT std_logic;
		canWrite : OUT std_logic;
		CELeftn : OUT std_logic;
		OELeftn : OUT std_logic;
		WELeftn : OUT std_logic;
		SRAMLeftAddr : OUT std_logic_vector(18 downto 0);
		ppstatus : OUT std_logic_vector(6 downto 3)
		);
	END COMPONENT;

begin

Inst_sraminterfacewithpport: sraminterfacewithpport PORT MAP(
		CLK => clk,
		Resetn => resetn,
		doRead => '0',
		doWrite => '0',
		readAddr => "0000000000000000000",
		writeAddr => "0000000000000000000",
		readData => open,
		writeData => x"0000",
		canRead => open,
		canWrite => open,
		CELeftn => celeftn,
		OELeftn => oeleftn,
		WELeftn => weleftn,
		SRAMLeftAddr => sramleftaddr,
		SRAMLeftData => sramleftdata,
		ppdata => ppdata,
		ppstatus => ppstatus
	);



end Behavioral;