代码搜索：carryout
找到约 76 项符合「carryout」的源代码
代码结果 76
www.eeworm.com/read/208166/4995540
java carryout_jsp.java
package org.apache.jsp;
import javax.servlet.*;
import javax.servlet.http.*;
import javax.servlet.jsp.*;
import java.sql.*;
public final class carryout_jsp extends org.apache.jasper.runtime.H
www.eeworm.com/read/208166/4995543
java carryout_jsp.java
package org.apache.jsp;
import javax.servlet.*;
import javax.servlet.http.*;
import javax.servlet.jsp.*;
import java.sql.*;
public final class carryout_jsp extends org.apache.jasper.runtime.H
www.eeworm.com/read/451913/7454193
eqn adder8.fit.eqn
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any o
www.eeworm.com/read/451913/7454170
eqn adder8.map.eqn
-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any o
www.eeworm.com/read/331453/12826581
v fulladd.v
// FullAdd.V
module fulladd(in1, in2, carryin, sum, carryout);
input in1, in2, carryin;
output sum, carryout;
wire sum, carryout;
assign {carryout, sum} = in1 + in2 + carryin;
endmodul
www.eeworm.com/read/290095/8505612
rpt fulladder_4.tan.rpt
Timing Analyzer report for FullAdder_4
Mon Nov 26 10:46:05 2007
Version 6.0 Build 178 04/27/2006 SJ Full Version
---------------------
; Table of Contents ;
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1. Legal
www.eeworm.com/read/290095/8505635
qmsg fulladder_4.tan.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0}
{ "I
www.eeworm.com/read/381763/9072540
v addersubtractor.v
// (C) 2004 Altera Corporation. All rights reserved. The design examples are
// being provided on an "as-is" basis and as an accommodation and therefore
// all warranties, representations or guar
www.eeworm.com/read/168922/9888406
v addersubtractor.v
// (C) 2003 Altera Corporation. All rights reserved. The design examples are
// being provided on an "as-is" basis and as an accommodation and therefore
// all warranties, representations or guar
www.eeworm.com/read/355936/10241155
v fulladd.v
module fulladd(a,b,carryin,sum,carryout);
input a, b, carryin; /* add these bits*/
output sum, carryout; /* results */
assign {carryout,sum} = a + b + carryin;
/* compute the sum and carr