代码搜索：VHDL
找到约 10,000 项符合「VHDL」的源代码
代码结果 10,000
www.eeworm.com/read/223125/14655426
ref hdllib.ref
EN decode47 NULL "E:/temp/sp3-U/UE Basic Board/VHDL/clock/decode47.vhd" sub00/vhpl06 1142562191
EN clock NULL "E:/temp/sp3-U/UE Basic Board/VHDL/clock/clock.vhf" sub00/vhpl12 1142562197
EN sel NULL
www.eeworm.com/read/223125/14655461
prj clock.prj
vhdl work "fen100.vhd"
vhdl work "fen24.vhd"
vhdl work "fen1.vhd"
vhdl work "decode47.vhd"
vhdl work "fen60.vhd"
vhdl work "sel.vhd"
vhdl work "clock.vhf"
www.eeworm.com/read/223125/14655480
cmd_log clock.cmd_log
xst -intstyle ise -ifn __projnav/clock.xst -ofn clock.syr
ngdbuild -dd _ngo -uc clock.ucf -p xc9500xl clock.ngc clock.ngd
cpldfit -p xc95144xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -s
www.eeworm.com/read/223125/14655514
log __projnav.log
Project Navigator Auto-Make Log File
-------------------------------------
Started process "Synthesize".
=========================================================================
*
www.eeworm.com/read/223125/14655789
lst netlist.lst
E:\temp\sp3-U\UE Basic Board\VHDL\clock\clock.ngc 1142562200
OK
www.eeworm.com/read/122400/14694153
txt 目录.txt
目 录
序
前言
第1章 数字系统的概念 1
1.1 什么是数字系统 1
1.2 数字系统的概况 2
1.2.1 层次 2
1.2.2 个人计算机 2
1.3 二进制数的介绍 3
1.4 数据的表示 5
1.5 二进制数及十进制数 6
1.5.1 二进制到十进制的转换 6
1.5.2 十进制到二进制的转换 8
1.5.3
www.eeworm.com/read/119738/14823320
txt filelist.txt
VHDL1 HLP 35.601 15/01/96 20:01 VHDL1.HLP read it
ADD4 OMT 7.680 15/01/96 14:49 ADD4.OMT adder 4 bits
FULLADD OMT 5.632 15/01/96 14:49 FULLADD.OMT adder 1 bit
www.eeworm.com/read/219674/14870833
npl freq_counter.npl
JDF G
// Created by Project Navigator ver 1.0
PROJECT Freq_counter
DESIGN freq_counter
DEVFAM spartan2
DEVFAMTIME 0
DEVICE xc2s100
DEVICETIME 0
DEVPKG pq208
DEVPKGTIME 0
DEVSPEED -6
DEVSPEE
www.eeworm.com/read/217286/14970509
cpp xsimtestbench_arch.cpp
#include "isim/work/decoder24_tbw/testbench_arch.h"
static const char * HSimCopyRightNotice = "Copyright 2004-2005, Xilinx Inc. All rights reserved.";
#include "C:/Xilinx/vhdl/hdp/nt/ieee/std_logic_
www.eeworm.com/read/217282/14970945
prj delay_tbw1_gen.prj
vhdl work "DELAY_VHD.vhd"
vhdl work "DELAY_tbw1.ant"