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找到约 10,000 项符合
VHDL 的代码
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:21:07 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity CONN64 is
port (
A: INOUT STD_LOGIC_VECTOR (64 DOWNTO 1))
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:30:42 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity FCT16245 is
port (
A: IN STD_LOGIC_VECTOR (7 DOWNTO 0)
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:24:25 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity EPC1064 is
port (
\cs*\: IN STD_LOGIC;
DATA: OUT
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:43:11 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity TLE2037 is
port (
\in+\: INOUT STD_LOGIC;
\in-\: INO
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:14:53 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity ACT574 is
port (
CLK: IN STD_LOGIC;
D0: IN
vhdl.vhd
-- generated by genview Wed Apr 15 08:29:54 1998
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity blockin is
port (
A: INOUT STD_LOGIC);
end blockin;
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:27:02 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity EPF8282A is
port (
ADD: OUT STD_LOGIC_VECTOR (13 DOWNTO 1
vhdl.vhd
-- generated by newgenasym Thu Mar 22 14:22:42 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity DG419 is
port (
D: INOUT STD_LOGIC;
GND: INOUT
vhdl.vhd
-- generated by newgenasym Fri Mar 16 11:23:24 2001
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity CAP_NP is
port (
A: INOUT STD_LOGIC;
B: INOU
vhdl.vhd
-- generated by genview Wed Apr 15 08:26:06 1998
library ieee;
use ieee.std_logic_1164.all;
use work.all;
entity blockout is
port (
A: INOUT STD_LOGIC);
end blockout;