vhdl.vhd

cadence公司pcb内部培训的资料,并且附带其中的例子程序!比市面上任何一本cadence的书好!

-- generated by newgenasym Thu Mar 22 14:30:42 2001

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity FCT16245 is
    port (    
	A:         IN     STD_LOGIC_VECTOR (7 DOWNTO 0);    
	B:         INOUT  STD_LOGIC_VECTOR (7 DOWNTO 0);    
	DIR:       IN     STD_LOGIC;    
	\g*\:      IN     STD_LOGIC);
end FCT16245;