代码搜索：Maxplus
找到约 394 项符合「Maxplus」的源代码
代码结果 394
www.eeworm.com/read/358683/10181964
rpt clock.rpt
Project Information d:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\clock.rpt
MAX+plus II Compiler Report File
Version 10.12 09/21/2001
Compiled: 12/09/2003 00:50:53
Copyright (C) 1988-2001 A
www.eeworm.com/read/416784/11013274
rpt mux8.rpt
Project Information d:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\mux8.rpt
MAX+plus II Compiler Report File
Version 10.12 09/21/2001
Compiled: 12/08/2003 13:16:38
Copyright (C) 1988-2001 A
www.eeworm.com/read/416784/11013421
rpt clock.rpt
Project Information d:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\clock.rpt
MAX+plus II Compiler Report File
Version 10.12 09/21/2001
Compiled: 12/09/2003 00:50:53
Copyright (C) 1988-2001 A
www.eeworm.com/read/129810/14225439
rpt mux8.rpt
Project Information d:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\mux8.rpt
MAX+plus II Compiler Report File
Version 10.12 09/21/2001
Compiled: 12/08/2003 13:16:38
Copyright (C) 1988-2001 A
www.eeworm.com/read/129810/14225581
rpt clock.rpt
Project Information d:\maxplus2\maxplus2\workplace\vhdl\vhdl0\clock1\clock.rpt
MAX+plus II Compiler Report File
Version 10.12 09/21/2001
Compiled: 12/09/2003 00:50:53
Copyright (C) 1988-2001 A
www.eeworm.com/read/152702/12092002
tcl st_mult1.tcl
# Run with quartus_sh -t
set_global_assignment -section_id st_mult1 -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL SYNPLIFY
set_global_assignment -section_id eda_design_synthesis -name EDA_INPUT
www.eeworm.com/read/152702/12092226
tcl st_mult1.tcl
# Run with quartus_sh -t
set_global_assignment -section_id st_mult1 -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL SYNPLIFY
set_global_assignment -section_id eda_design_synthesis -name EDA_INPUT
www.eeworm.com/read/333422/12683418
vhd debouncing.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
library altera;
use altera.maxplus2.all;
--
--***********************
entity debouncing is
port
(
d_in,
www.eeworm.com/read/18797/801892
pl altera_compatible.pl
#!/usr/sww/bin/perl
print "reparing the inputs and outputs in order to be compatible\n";
print "with MaxPlus. Changes : W = $ARGV[0], S = $ARGV[1]\n";
chdir $ARGV[2];
system "cp ../lib/* .";
system
www.eeworm.com/read/200301/15435789
vhd debouncing.vhd
--防抖模块
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
LIBRARY altera;
USE altera.maxplus2.ALL;
ENTITY debouncing IS
PORT
(
d_in, clk : IN STD_LOGIC;