代码搜索：Logic Analyzer
找到约 10,000 项符合「Logic Analyzer」的源代码
代码结果 10,000
www.eeworm.com/read/344483/11877045
vhd pause.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_signed.all;
ENTITY pause IS
PORT( run:IN std_logic;
pause:IN std_logic;
ps:OUT std_logic
);
END;
www.eeworm.com/read/344483/11877047
vhd fset.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_signed.all;
ENTITY fset IS
PORT(
run:IN std_logic;
mode:IN std_logic;
reset:IN std_logic;
www.eeworm.com/read/344483/11877049
vhd fswitch.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_signed.all;
ENTITY fswitch IS
PORT( clk:IN std_logic;
run:IN std_logic;
mode:IN std_logic;
rp:I
www.eeworm.com/read/344483/11877059
vhd foption.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_signed.all;
ENTITY foption IS
PORT(
cp1:IN std_logic;
cp2:IN std_logic;
status:IN std_logic_
www.eeworm.com/read/344039/11911458
vhd service_module.vhd
--**********************************************************************************************
-- Some additional control registers for the AVR Core
-- Version 0.7 20.05.2003
-- Designed by Rusla
www.eeworm.com/read/344039/11911472
vhd io_reg_file.vhd
--************************************************************************************************
-- Internal I/O registers (implemented inside the core) decoder/multiplexer
-- for AVR core
-- Versi
www.eeworm.com/read/154707/11934029
vhd shiyan.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity SHIYAN is
port(
clk: in std_logic; --CHU FA SOURCE CHOOSE
WAY1: in
www.eeworm.com/read/343484/11944601
vhd 6713emiftofpgatopci.vhd
----------------------------------------------------------------------------------
-- Company: ioe
-- Engineer: dingke
--
-- Create Date: 01:00:14 04/05/2008
-- Design Name: dpram for dsp6713
www.eeworm.com/read/343483/11944609
vhd pcitohpi16.vhd
----------------------------------------------------------------------------------
-- Company: ioe
-- Engineer: dingke
--
-- Create Date: 16:00:14 04/15/2008
-- Design Name: pci to hpi of c671
www.eeworm.com/read/255821/12055527
txt 超前进位加法器.txt
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity add_n is
generic
(
n:integer:=8
);
port
(
cin:in std_logic;
cout:out std_logic;
a,b: in std_