代码搜索：FPGA
找到约 10,000 项符合「FPGA」的源代码
代码结果 10,000
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mti fulladder.cr.mti
{F:/FPGA exp/FullAdder/top.vhd} {1 {vcom -work work -2002 -explicit {F:/FPGA exp/FullAdder/top.vhd}
Model Technology ModelSim SE vcom 6.1b Compiler 2005.09 Sep 8 2005
-- Loading package standard
-
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ucf system.ucf
############################################################################
## This system.ucf file is generated by Base System Builder based on the
## settings in the selected Xilinx Board Definitio
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ref hdllib.ref
EN bcd_7seg NULL G:/vijay_FPGA_LAB/bcd_7seg/bcd_7seg.vhd sub00/vhpl00
EN bcd_7seg_sch NULL G:/vijay_FPGA_LAB/bcd_7seg/bcd_7seg_sch.vhf sub00/vhpl04
EN d3_8e_mxilinx_bcd_7seg_sch NULL G:/vijay_FPGA_L
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cmd_log bit_add.cmd_log
xst -intstyle ise -ifn __projnav/bit_add.xst -ofn bit_add.syr
xst -intstyle ise -ifn __projnav/bit_add.xst -ofn bit_add.syr
ngdbuild -intstyle ise -dd g:\vijay_fpga_lab\1bit_add/_ngo -i -p xc3s50-p
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zsf wed.zsf
F:/fpga test/mcu_sram_test/mcu_sram_test.vwf 0 6151866 777 6151866 2
F:/fpga test/mcu_sram_test/sram_control.vwf 0 1000000 859 1000000 0
F:/fpga test/mcu_sram_test/mcu_fpga_control.vwf 1328000 26560
www.eeworm.com/read/327630/13069993
qmsg phase_shift_sin.fit.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0}
{ "I
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qmsg txd.tan.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Runni
www.eeworm.com/read/319407/13452212
srs reg_counter.srs
#
#
#
# Created by Synplify Verilog HDL Compiler version 3.1.0, Build 049R from Synplicity, Inc.
# Copyright 1994-2004 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Tue J
www.eeworm.com/read/313103/13596618
txt 使用说明.txt
使用说明
1、需要根据自己的电路进行管脚配置
2、运行后，左侧4个数码管显示AD的数据，这里已经把数据转换好了，单位是mV，范围是0～2V，右侧的数码管是频率，在10KHz以上的频率会自动转换显示，范围是99K～0Hz
3、AD输出时需要电平转换，另外AD的时钟把<mark>FPGA</mark>的输出转换为5V电平
注意：
1、频率测量部分会有一些误差，需要外接比较器并调整好
2、使用时芯片会很 ...