phase_shift_sin.fit.qmsg

来自「实现低频率的移相信号发生器,才用DDS技术直接的合成」· QMSG 代码 · 共 51 行 · 第 1/5 页

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu May 10 09:02:23 2007 " "Info: Processing started: Thu May 10 09:02:23 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off phase_shift_sin -c phase_shift_sin " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off phase_shift_sin -c phase_shift_sin" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "phase_shift_sin EP1C3T144C8 " "Info: Selected device EP1C3T144C8 for design \"phase_shift_sin\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6T144C8 " "Info: Device EP1C6T144C8 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "12 37 " "Info: No exact pin location assignment(s) for 12 pins of 37 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[0\] " "Info: Pin pout\[0\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[0\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[0] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[1\] " "Info: Pin pout\[1\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[1\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[1] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[2\] " "Info: Pin pout\[2\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[2\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[2] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[3\] " "Info: Pin pout\[3\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[3\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[3] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[4\] " "Info: Pin pout\[4\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[4\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[4] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[5\] " "Info: Pin pout\[5\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[5\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[5] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[6\] " "Info: Pin pout\[6\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[6\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[6] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "pout\[7\] " "Info: Pin pout\[7\] not assigned to an exact location on the device" {  } { { "phase_shift_sin.vhd" "" { Text "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.vhd" 7 -1 0 } } { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "pout\[7\]" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { pout[7] } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { pout[7] } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tdo " "Info: Pin altera_reserved_tdo not assigned to an exact location on the device" {  } { { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tdo" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { altera_reserved_tdo } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { altera_reserved_tdo } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tms " "Info: Pin altera_reserved_tms not assigned to an exact location on the device" {  } { { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tms" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { altera_reserved_tms } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { altera_reserved_tms } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tck " "Info: Pin altera_reserved_tck not assigned to an exact location on the device" {  } { { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tck" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { altera_reserved_tck } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { altera_reserved_tck } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "altera_reserved_tdi " "Info: Pin altera_reserved_tdi not assigned to an exact location on the device" {  } { { "d:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "altera_reserved_tdi" } } } } { "d:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "d:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "phase_shift_sin" "UNKNOWN" "V1" "E:/老项目/数字移相信号发生器/fpga/db/phase_shift_sin.quartus_db" { Floorplan "E:/老项目/数字移相信号发生器/fpga/" "" "" { altera_reserved_tdi } "NODE_NAME" } "" } } { "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" { Floorplan "E:/老项目/数字移相信号发生器/fpga/phase_shift_sin.fld" "" "" { altera_reserved_tdi } "NODE_NAME" } }  } 0 0 "Pin %1!s! not assigned to an exact location on the device" 0 0}  } {  } 0 0 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins" 0 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0 0 "Assuming a global %1!s! requirement of %2!s!" 0 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0 0 "Not setting a global %1!s! requirement" 0 0}  } {  } 0 0 "Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" 0 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0 0 "Performing register packing on registers with non-logic cell location assignments" 0 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0 0 "Completed register packing on registers with non-logic cell location assignments" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}