代码搜索：Carry
找到约 8,060 项符合「Carry」的源代码
代码结果 8,060
www.eeworm.com/read/433434/7930406
v counter_4b.v
module counter_4b(count,carry_out,carry_in,clk,reset);
output [3:0] count;
output carry_out;
input clk,reset,carry_in;
reg [3:0] count;
reg carry_out;
initial count=0;
function [3:0] increment;
inp
www.eeworm.com/read/385917/8781227
cdb carry_propogate_adder.rtlv_sg_swap.cdb
www.eeworm.com/read/385917/8781229
cdb carry_propogate_adder.(0).cnf.cdb
www.eeworm.com/read/385917/8781245
hdb carry_propogate_adder.(0).cnf.hdb
www.eeworm.com/read/385917/8781280
sci carry_propogate_adder.sld_design_entry.sci
www.eeworm.com/read/385917/8781322
cdb carry_propogate_adder.(1).cnf.cdb
www.eeworm.com/read/385917/8781324
hdb carry_propogate_adder.(1).cnf.hdb
www.eeworm.com/read/368409/9696998
v adder8_for.v
//----------------------------------------
//8-bit adder using for loop
//Filename : adder8_for.v
//----------------------------------------
module adder8_for(sum, cout, a, b, cin);
parameter len
www.eeworm.com/read/212599/7097066
v it51_addsub.v
module AddSub1(
A,
B,
Sub,
Carry_In,
Res,
Carry
);
input A;
input B;
input Sub;
input Carry_In;
output Res;
output Carry;
reg Res;
www.eeworm.com/read/329914/7109681
vhd day.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity day is
port( dh,dl: buffer std_logic_vector (3 downto 0);
clk : in std_l