counter_4b.v

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module counter_4b(count,carry_out,carry_in,clk,reset);

output [3:0] count;
output carry_out;
input clk,reset,carry_in;

reg [3:0] count;
reg carry_out;
initial count=0;

function [3:0] increment;
input [3:0] val;
reg [1:0] i;
reg carry;
begin
	increment=val;
	carry =carry_in;
	if(increment==4'b1111)
	   begin
	       if(carry_in==1)
	         begin
	         increment=0;	  
	         carry_out=1; 
	         end
	   end
	 else
	    begin
	      for(i=2'b0;((carry==2'b01)&&(i<=3));i=i+2'b01)
	         begin
	          increment[i]=val[i]^carry;
	          carry=val[i]&carry;
	          end	          
	       carry_out=0;
	     end      
    
end
endfunction

always @ (posedge clk )
	if(reset)
           begin
	        count=4'b0;
           //carry_out=1'b0;
           end
	else
           count=increment(count);



endmodule