代码搜索：Behaviour
找到约 1,042 项符合「Behaviour」的源代码
代码结果 1,042
www.eeworm.com/read/285975/8798148
080_best ch06.080_best
##############################################################################
## Code fragment (Recommended) from Chapter 6 of "Perl Best Practices" ##
## Copyright (c) O'Reilly & Associates
www.eeworm.com/read/285975/8798260
078_best ch06.078_best
##############################################################################
## Code fragment (Recommended) from Chapter 6 of "Perl Best Practices" ##
## Copyright (c) O'Reilly & Associates
www.eeworm.com/read/283738/8991757
ref hdllib.ref
EN sram NULL G:/MyFPGA/sram2.vhd sub00/vhpl02
AR sram behaviour G:/MyFPGA/sram2.vhd sub00/vhpl03
EN my_sram NULL G:/MyFPGA/my_sram.vhd sub00/vhpl00
AR my_sram behavioral G:/MyFPGA/my_sram.vhd sub00
www.eeworm.com/read/271050/11010795
arch d_latch.arch
-- +-----------------------------+
-- | Library: FF |
-- | designer : Tim Pagden |
-- | opened: 6 Jun 1993 |
-- +-----------------------------+
-- Architectures:
www.eeworm.com/read/461590/7223891
vhd signext_26_32.vhd
use work.dp32_types.all;
entity signext_26_32 is
generic (Tpd : Time := unit_delay);
port (a : in bit_26;
b : out bus_bit_32 bus;
en : in bit);
end signext_26_32;
architecture behaviour
www.eeworm.com/read/461590/7223905
vhd create_flags.vhd
use work.dp32_types.all;
entity create_flags is
port (nan, z, v,u,n: in bit;
flags : out bit_5);
end create_flags;
architecture behaviour of create_flags is
begin
main : process (nan,z,v,u
www.eeworm.com/read/461590/7223918
vhd signext_8_32.vhd
--
-- $RCSfile: signext_8_32.vhd,v $
-- $Revision: 1.1 $
-- $Author: petera $
-- $Date: 90/05/17 16:10:58 $
--
use WORK.dp32_types.all;
entity signext_8_32 is
generic (Tpd : Time := unit_delay);
www.eeworm.com/read/461590/7223919
vhd fp_div_create_flags.vhd
use work.dp32_types.all;
entity create_flags is
port (nan, z, v,u,n: in bit;
flags : out bit_7);
end create_flags;
architecture behaviour of divider is
begin
main:process (nan,z,v,u,n)
f
www.eeworm.com/read/461590/7223936
vhd signext_16_32.vhd
--
-- $RCSfile: signext_8_32.vhd,v $
-- $Revision: 1.1 $
-- $Author: petera $
-- $Date: 90/05/17 16:10:58 $
--
use work.dp32_types.all;
entity signext_16_32 is
generic (Tpd : Time := unit_delay);
www.eeworm.com/read/461590/7223937
vhd buffer_32.vhd
--
-- $RCSfile: buffer_32.vhd,v $
-- $Revision: 1.1 $
-- $Author: petera $
-- $Date: 90/05/17 16:20:17 $
--
use work.dp32_types.all;
entity buffer_32 is
generic (Tpd : Time := unit_delay);
port