代码搜索：1Hz
找到约 197 项符合「1Hz」的源代码
代码结果 197
www.eeworm.com/read/412366/11202709
vhd divider.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY divider IS
PORT(iCLK:in std_logic;--input,1KHz
oCLK:out std_logic);--output,1Hz
END divider;
ARCHITECTURE arch OF divider IS
SIGNAL cou
www.eeworm.com/read/161666/10387795
vhd clock.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY clock IS
port(clk: IN STD_LOGIC; --system clock , 1HZ
settime: I
www.eeworm.com/read/332506/12751743
asm t8254-1.asm
;T8254-1.asm
;8254定时应用实验 输出1Hz
;****************根据查看端口资源修改下列符号值*******************
IOY0 EQU 9C00H
;*****************************************************************
MY8254_COUNT0
www.eeworm.com/read/145124/12752925
vhd clock.vhd
Library IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY clock IS
PORT(clk: IN STD_LOGIC; --system clock,1HZ
settime: IN STD
www.eeworm.com/read/228702/14365784
asm t8254-1.asm
;T8254-1.asm
;8254定时应用实验 输出1Hz
;****************根据查看端口资源修改下列符号值*******************
IOY0 EQU 9C00H
;*****************************************************************
MY8254_COUNT0
www.eeworm.com/read/419643/10851735
m ofdm.m
% Modulation OFDM
clear all;
Fd=1; % symbol rate (1Hz)
Fs=1*Fd; % so luong mau moi symbol
M=4; % So muc duoc dieu che tren moi song mang
Ndata=1024; % so symbol duoc truyen
Sdata=64;
www.eeworm.com/read/464013/7170846
vhd second.vhd
-------------------------------------------------
--实体名：second
--功 能：对输入时钟进行50000000分频，得到1Hz信号
--接 口：clk -时钟输入
-- qout-秒输出信号
--作 者：Haibing Li
--日 期：2006-11
--------------------------
www.eeworm.com/read/304086/13801412
vhd clock5.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY clock5 IS
PORT(clk: IN STD_LOGIC; --system clock,1hz
setti
www.eeworm.com/read/404551/11483243
vhd clock5.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY clock5 IS
PORT(clk: IN STD_LOGIC; --system clock,1hz
setti
www.eeworm.com/read/166859/9993516
tdf count10.tdf
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity count10 is
port( clk:in std_logic; --1hz
en:in std_l