搜索结果

找到约 8,501 项符合 system verilog 的查询结果

按分类筛选

显示更多分类

Delphi控件源码 ZipForge is a fast ZIP compression library. With this toolkit you can easily add archive functionali

ZipForge is a fast ZIP compression library. With this toolkit you can easily add archive functionality to your projects. ZipForge includes our new unique techonology, a transaction system. This innovative solution gives you a fast and easy way of updating archive files providing data integrity like ...
https://www.eeworm.com/dl/666/137300.html
下载: 68
查看: 1098

通讯/手机编程 Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range

Jitter is extremely important in systems using PLL-based clock drivers. The effects of jitter range from not having any effect on system operation to rendering the system completely non-functional. This application note provides the reader with a clear understanding of jitter in high-speed systems. ...
https://www.eeworm.com/dl/527/228952.html
下载: 117
查看: 1087

Delphi控件源码 2003年的远程控制

2003年的远程控制,国内用户知道的比较少 生成的服务端将自己复制到 %SYSTEM% 目录下并改名为 PROSIAK_TROJAN.EXE,驻留内存.并删除 %SYSTEM% 目录下的WINDLL32.EXE ,VBRUN60.EXE ,GDI32.EXE , MSJET32.EXE 和 RUNDLL32.EXE 文件
https://www.eeworm.com/dl/666/409894.html
下载: 139
查看: 1046

软件工程 Software-defined radios (SDRs) have been around for more than a decade. The first complete Global P

Software-defined radios (SDRs) have been around for more than a decade. The first complete Global Positioning System (GPS) implementation was described by Dennis Akos in 1997. Since then several research groups have presented their contributions.We therefore find it timely to publish an up-to-date t ...
https://www.eeworm.com/dl/540/450087.html
下载: 108
查看: 1050

GPS编程 Software-defined radios (SDRs) have been around for more than a decade. The first complete Global P

Software-defined radios (SDRs) have been around for more than a decade. The first complete Global Positioning System (GPS) implementation was described by Dennis Akos in 1997. Since then several research groups have presented their contributions.We therefore find it timely to publish an up-to-date t ...
https://www.eeworm.com/dl/693/483522.html
下载: 194
查看: 1074

VHDL/FPGA/Verilog 精简的sdram读写控制器例子

精简的sdram读写控制器例子,适用于数据采集系统,verilog,只支持burst方式的读写
https://www.eeworm.com/dl/663/151466.html
下载: 164
查看: 1088

VHDL/FPGA/Verilog fir ISP design fir VHDL VHDL编程滤波的硬件描述语言实现

fir ISP design fir VHDL VHDL编程滤波的硬件描述语言实现,包括VHDL语言和verilog语言
https://www.eeworm.com/dl/663/186387.html
下载: 190
查看: 1089

VHDL/FPGA/Verilog 一个SDH中最基本传输模块STM-1的帧头检测器

一个SDH中最基本传输模块STM-1的帧头检测器,verilog编程实现
https://www.eeworm.com/dl/663/227230.html
下载: 149
查看: 1216

VHDL/FPGA/Verilog 自动卖报机

自动卖报机,5分一份,有1,2,5分类型的硬币。verilog状态机
https://www.eeworm.com/dl/663/264924.html
下载: 108
查看: 1084

微处理器开发 ARM7的源代码

ARM7的源代码,能够实现ARM7的基本功能,VHDL以及Verilog语言开发。
https://www.eeworm.com/dl/655/344017.html
下载: 131
查看: 1037