ex_p6_12_write_bin_data.vhd

This is the course for VHDL programming

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use STD.TEXTIO.all;
entity FILEWRTBIN is end FILEWRTBIN;
architecture arch of FILEWRTBIN is
    type REC_T is record
         x:integer;
	      y:std_logic_vector(3 downto 0);
	      z:std_logic;
	      u:character;
	      v:real;
	 end record;
    type REC_FILE_T is file of REC_T;
BEGIN
  PROCESS
	file FILE_OBJ:REC_FILE_T open WRITE_MODE is "BIN_DATA";
	variable R:REC_T:=(1,"0000",'0','A',5.0);
	variable lout:LINE;
  begin
	for i in 1 to 10 loop
	   R.x := i;		      
	   R.y := R.y+1;      
	   R.z := not R.z;    
		R.u := character'rightof(R.u); 
		R.v := R.v + 1.0;
      WRITE(FILE_OBJ, R);
   end loop;
	WRITE(lout, string'("Binary file written\n"));
   WRITELINE(OUTPUT, lout);
   FILE_CLOSE(FILE_OBJ);
	wait;
  END PROCESS;
END arch ;