ex_p6_13_create_old_data.vhd

This is the course for VHDL programming

use STD.TEXTIO.all;
entity FILEWRT_OLD is end FILEWRT_OLD;
architecture arch of FILEWRT_OLD is
    type REC_OLD_T is record
         x,y,z,u,v,w:bit;
	 end record;
	 type REC_NEW_T is record
         a,b:bit;
	 end record;
    type OLD_FILE_T is file of REC_OLD_T;
    type NEW_FILE_T is file of REC_NEW_T;
BEGIN
  PROCESS
	file FILE_OBJ_OLD:OLD_FILE_T 
	   open WRITE_MODE is "OLD_DATA";
	file FILE_OBJ_NEW:NEW_FILE_T 
	   open WRITE_MODE is "NEW_RESULT";
	variable R_OLD:REC_OLD_T;
	variable R_NEW:REC_NEW_T;
	variable lout:LINE;
  begin
   R_OLD := ('0','0','0','0','0','0');
	WRITE(FILE_OBJ_OLD, R_OLD);
	R_OLD := ('1','1','1','0','0','0');
	WRITE(FILE_OBJ_OLD, R_OLD);
	R_OLD := ('0','0','0','1','1','1');
	WRITE(FILE_OBJ_OLD, R_OLD);
	R_OLD := ('1','1','1','1','1','1');
	WRITE(FILE_OBJ_OLD, R_OLD);
	
	R_NEW := ('0','0');
	WRITE(FILE_OBJ_NEW, R_NEW);
	R_NEW := ('0','1');
	WRITE(FILE_OBJ_NEW, R_NEW);
	R_NEW := ('1','0');
	WRITE(FILE_OBJ_NEW, R_NEW);
	R_NEW := ('1','1');
	WRITE(FILE_OBJ_NEW, R_NEW);
   
	WRITE(lout, string'("Old and new files written\n"));
   WRITELINE(OUTPUT, lout);
   FILE_CLOSE(FILE_OBJ_OLD);
   FILE_CLOSE(FILE_OBJ_NEW);
	wait;
  END PROCESS;
END arch ;