integerdiv.map.rpt

一个任意整数分频程序,采用VHDL语言编写

;     -- Total 1-input functions    ; 8       ;
;     -- Total 0-input functions    ; 0       ;
; Combinational cells for routing   ; 0       ;
; Total registers                   ; 8       ;
; Total logic cells in carry chains ; 8       ;
; I/O pins                          ; 6       ;
; Maximum fan-out node              ; q[1]    ;
; Maximum fan-out                   ; 10      ;
; Total fan-out                     ; 81      ;
; Average fan-out                   ; 2.89    ;
+-----------------------------------+---------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                 ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------+---------------------------------------------------------------------+
; Compilation Hierarchy Node             ; Logic Cells ; LC Registers ; Memory Bits ; Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name                                                 ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------+---------------------------------------------------------------------+
; |integerdiv                            ; 22 (14)     ; 8            ; 0           ; 6    ; 14 (14)      ; 0 (0)             ; 8 (0)            ; 8 (0)           ; 0 (0)      ; |integerdiv                                                         ;
;    |lpm_counter:count1_rtl_1|          ; 4 (0)       ; 4            ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 4 (0)            ; 4 (0)           ; 0 (0)      ; |integerdiv|lpm_counter:count1_rtl_1                                ;
;       |alt_counter_f10ke:wysi_counter| ; 4 (4)       ; 4            ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 4 (4)            ; 4 (4)           ; 0 (0)      ; |integerdiv|lpm_counter:count1_rtl_1|alt_counter_f10ke:wysi_counter ;
;    |lpm_counter:count2_rtl_0|          ; 4 (0)       ; 4            ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 4 (0)            ; 4 (0)           ; 0 (0)      ; |integerdiv|lpm_counter:count2_rtl_0                                ;
;       |alt_counter_f10ke:wysi_counter| ; 4 (4)       ; 4            ; 0           ; 0    ; 0 (0)        ; 0 (0)             ; 4 (4)            ; 4 (4)           ; 0 (0)      ; |integerdiv|lpm_counter:count2_rtl_0|alt_counter_f10ke:wysi_counter ;
+----------------------------------------+-------------+--------------+-------------+------+--------------+-------------------+------------------+-----------------+------------+---------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 8     ;
; Number of registers using Synchronous Clear  ; 8     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 0     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 0     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+---------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_counter:count2_rtl_0 ;
+------------------------+-------------------+------------------------------+
; Parameter Name         ; Value             ; Type                         ;
+------------------------+-------------------+------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                   ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                 ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                 ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE               ;
; LPM_WIDTH              ; 4                 ; Untyped                      ;
; LPM_DIRECTION          ; UP                ; Untyped                      ;
; LPM_MODULUS            ; 0                 ; Untyped                      ;
; LPM_AVALUE             ; UNUSED            ; Untyped                      ;
; LPM_SVALUE             ; UNUSED            ; Untyped                      ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                      ;
; DEVICE_FAMILY          ; ACEX1K            ; Untyped                      ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                      ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH           ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK           ;
; CARRY_CNT_EN           ; SMART             ; Untyped                      ;
; LABWIDE_SCLR           ; ON                ; Untyped                      ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                      ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                      ;
+------------------------+-------------------+------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_counter:count1_rtl_1 ;
+------------------------+-------------------+------------------------------+
; Parameter Name         ; Value             ; Type                         ;
+------------------------+-------------------+------------------------------+
; AUTO_CARRY_CHAINS      ; ON                ; AUTO_CARRY                   ;
; IGNORE_CARRY_BUFFERS   ; OFF               ; IGNORE_CARRY                 ;
; AUTO_CASCADE_CHAINS    ; ON                ; AUTO_CASCADE                 ;
; IGNORE_CASCADE_BUFFERS ; OFF               ; IGNORE_CASCADE               ;
; LPM_WIDTH              ; 4                 ; Untyped                      ;
; LPM_DIRECTION          ; UP                ; Untyped                      ;
; LPM_MODULUS            ; 0                 ; Untyped                      ;
; LPM_AVALUE             ; UNUSED            ; Untyped                      ;
; LPM_SVALUE             ; UNUSED            ; Untyped                      ;
; LPM_PORT_UPDOWN        ; PORT_CONNECTIVITY ; Untyped                      ;
; DEVICE_FAMILY          ; ACEX1K            ; Untyped                      ;
; CARRY_CHAIN            ; MANUAL            ; Untyped                      ;
; CARRY_CHAIN_LENGTH     ; 48                ; CARRY_CHAIN_LENGTH           ;
; NOT_GATE_PUSH_BACK     ; ON                ; NOT_GATE_PUSH_BACK           ;
; CARRY_CNT_EN           ; SMART             ; Untyped                      ;
; LABWIDE_SCLR           ; ON                ; Untyped                      ;
; USE_NEW_VERSION        ; TRUE              ; Untyped                      ;
; CBXI_PARAMETER         ; NOTHING           ; Untyped                      ;
+------------------------+-------------------+------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Tue Apr 21 20:19:02 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off integerdiv -c integerdiv
Info: Found 2 design units, including 1 entities, in source file integerdiv.vhd
    Info: Found design unit 1: integerdiv-one
    Info: Found entity 1: integerdiv
Info: Elaborating entity "integerdiv" for the top level hierarchy
Warning (10492): VHDL Process Statement warning at integerdiv.vhd(36): signal "n" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at integerdiv.vhd(37): signal "n" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at integerdiv.vhd(38): signal "n" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at integerdiv.vhd(40): signal "n" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning (10492): VHDL Process Statement warning at integerdiv.vhd(43): signal "clk" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Info: Inferred 2 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "count2[0]~4"
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "count1[0]~4"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "lpm_counter:count2_rtl_0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/alt_counter_f10ke.tdf
    Info: Found entity 1: alt_counter_f10ke
Info: Elaborated megafunction instantiation "lpm_counter:count2_rtl_0|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "lpm_counter:count2_rtl_0"
Info: Instantiated megafunction "lpm_counter:count2_rtl_0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "4"
    Info: Parameter "LPM_DIRECTION" = "UP"
    Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Implemented 28 device resources after synthesis - the final resource count might be different
    Info: Implemented 5 input pins
    Info: Implemented 1 output pins
    Info: Implemented 22 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 5 warnings
    Info: Processing ended: Tue Apr 21 20:19:05 2009
    Info: Elapsed time: 00:00:04