mux_frc.tdf

用VHDL语言设计简单的CPU

	l2_w0_n34_mux_dataout	:	WIRE;
	l2_w0_n35_mux_dataout	:	WIRE;
	l2_w0_n36_mux_dataout	:	WIRE;
	l2_w0_n37_mux_dataout	:	WIRE;
	l2_w0_n38_mux_dataout	:	WIRE;
	l2_w0_n39_mux_dataout	:	WIRE;
	l2_w0_n3_mux_dataout	:	WIRE;
	l2_w0_n40_mux_dataout	:	WIRE;
	l2_w0_n41_mux_dataout	:	WIRE;
	l2_w0_n42_mux_dataout	:	WIRE;
	l2_w0_n43_mux_dataout	:	WIRE;
	l2_w0_n44_mux_dataout	:	WIRE;
	l2_w0_n45_mux_dataout	:	WIRE;
	l2_w0_n46_mux_dataout	:	WIRE;
	l2_w0_n47_mux_dataout	:	WIRE;
	l2_w0_n48_mux_dataout	:	WIRE;
	l2_w0_n49_mux_dataout	:	WIRE;
	l2_w0_n4_mux_dataout	:	WIRE;
	l2_w0_n50_mux_dataout	:	WIRE;
	l2_w0_n51_mux_dataout	:	WIRE;
	l2_w0_n52_mux_dataout	:	WIRE;
	l2_w0_n53_mux_dataout	:	WIRE;
	l2_w0_n54_mux_dataout	:	WIRE;
	l2_w0_n55_mux_dataout	:	WIRE;
	l2_w0_n56_mux_dataout	:	WIRE;
	l2_w0_n57_mux_dataout	:	WIRE;
	l2_w0_n58_mux_dataout	:	WIRE;
	l2_w0_n59_mux_dataout	:	WIRE;
	l2_w0_n5_mux_dataout	:	WIRE;
	l2_w0_n60_mux_dataout	:	WIRE;
	l2_w0_n61_mux_dataout	:	WIRE;
	l2_w0_n62_mux_dataout	:	WIRE;
	l2_w0_n63_mux_dataout	:	WIRE;
	l2_w0_n6_mux_dataout	:	WIRE;
	l2_w0_n7_mux_dataout	:	WIRE;
	l2_w0_n8_mux_dataout	:	WIRE;
	l2_w0_n9_mux_dataout	:	WIRE;
	l3_w0_n0_mux_dataout	:	WIRE;
	l3_w0_n10_mux_dataout	:	WIRE;
	l3_w0_n11_mux_dataout	:	WIRE;
	l3_w0_n12_mux_dataout	:	WIRE;
	l3_w0_n13_mux_dataout	:	WIRE;
	l3_w0_n14_mux_dataout	:	WIRE;
	l3_w0_n15_mux_dataout	:	WIRE;
	l3_w0_n16_mux_dataout	:	WIRE;
	l3_w0_n17_mux_dataout	:	WIRE;
	l3_w0_n18_mux_dataout	:	WIRE;
	l3_w0_n19_mux_dataout	:	WIRE;
	l3_w0_n1_mux_dataout	:	WIRE;
	l3_w0_n20_mux_dataout	:	WIRE;
	l3_w0_n21_mux_dataout	:	WIRE;
	l3_w0_n22_mux_dataout	:	WIRE;
	l3_w0_n23_mux_dataout	:	WIRE;
	l3_w0_n24_mux_dataout	:	WIRE;
	l3_w0_n25_mux_dataout	:	WIRE;
	l3_w0_n26_mux_dataout	:	WIRE;
	l3_w0_n27_mux_dataout	:	WIRE;
	l3_w0_n28_mux_dataout	:	WIRE;
	l3_w0_n29_mux_dataout	:	WIRE;
	l3_w0_n2_mux_dataout	:	WIRE;
	l3_w0_n30_mux_dataout	:	WIRE;
	l3_w0_n31_mux_dataout	:	WIRE;
	l3_w0_n3_mux_dataout	:	WIRE;
	l3_w0_n4_mux_dataout	:	WIRE;
	l3_w0_n5_mux_dataout	:	WIRE;
	l3_w0_n6_mux_dataout	:	WIRE;
	l3_w0_n7_mux_dataout	:	WIRE;
	l3_w0_n8_mux_dataout	:	WIRE;
	l3_w0_n9_mux_dataout	:	WIRE;
	l4_w0_n0_mux_dataout	:	WIRE;
	l4_w0_n10_mux_dataout	:	WIRE;
	l4_w0_n11_mux_dataout	:	WIRE;
	l4_w0_n12_mux_dataout	:	WIRE;
	l4_w0_n13_mux_dataout	:	WIRE;
	l4_w0_n14_mux_dataout	:	WIRE;
	l4_w0_n15_mux_dataout	:	WIRE;
	l4_w0_n1_mux_dataout	:	WIRE;
	l4_w0_n2_mux_dataout	:	WIRE;
	l4_w0_n3_mux_dataout	:	WIRE;
	l4_w0_n4_mux_dataout	:	WIRE;
	l4_w0_n5_mux_dataout	:	WIRE;
	l4_w0_n6_mux_dataout	:	WIRE;
	l4_w0_n7_mux_dataout	:	WIRE;
	l4_w0_n8_mux_dataout	:	WIRE;
	l4_w0_n9_mux_dataout	:	WIRE;
	l5_w0_n0_mux_dataout	:	WIRE;
	l5_w0_n1_mux_dataout	:	WIRE;
	l5_w0_n2_mux_dataout	:	WIRE;
	l5_w0_n3_mux_dataout	:	WIRE;
	l5_w0_n4_mux_dataout	:	WIRE;
	l5_w0_n5_mux_dataout	:	WIRE;
	l5_w0_n6_mux_dataout	:	WIRE;
	l5_w0_n7_mux_dataout	:	WIRE;
	l6_w0_n0_mux_dataout	:	WIRE;
	l6_w0_n1_mux_dataout	:	WIRE;
	l6_w0_n2_mux_dataout	:	WIRE;
	l6_w0_n3_mux_dataout	:	WIRE;
	l7_w0_n0_mux_dataout	:	WIRE;
	l7_w0_n1_mux_dataout	:	WIRE;
	l8_w0_n0_mux_dataout	:	WIRE;
	data_wire[509..0]	: WIRE;
	sel_wire[7..0]	: WIRE;

BEGIN 
	l1_w0_n0_mux_dataout = sel_wire[0..0] & data_wire[1..1] # !(sel_wire[0..0]) & data_wire[0..0];
	l1_w0_n100_mux_dataout = sel_wire[0..0] & data_wire[201..201] # !(sel_wire[0..0]) & data_wire[200..200];
	l1_w0_n101_mux_dataout = sel_wire[0..0] & data_wire[203..203] # !(sel_wire[0..0]) & data_wire[202..202];
	l1_w0_n102_mux_dataout = sel_wire[0..0] & data_wire[205..205] # !(sel_wire[0..0]) & data_wire[204..204];
	l1_w0_n103_mux_dataout = sel_wire[0..0] & data_wire[207..207] # !(sel_wire[0..0]) & data_wire[206..206];
	l1_w0_n104_mux_dataout = sel_wire[0..0] & data_wire[209..209] # !(sel_wire[0..0]) & data_wire[208..208];
	l1_w0_n105_mux_dataout = sel_wire[0..0] & data_wire[211..211] # !(sel_wire[0..0]) & data_wire[210..210];
	l1_w0_n106_mux_dataout = sel_wire[0..0] & data_wire[213..213] # !(sel_wire[0..0]) & data_wire[212..212];
	l1_w0_n107_mux_dataout = sel_wire[0..0] & data_wire[215..215] # !(sel_wire[0..0]) & data_wire[214..214];
	l1_w0_n108_mux_dataout = sel_wire[0..0] & data_wire[217..217] # !(sel_wire[0..0]) & data_wire[216..216];
	l1_w0_n109_mux_dataout = sel_wire[0..0] & data_wire[219..219] # !(sel_wire[0..0]) & data_wire[218..218];
	l1_w0_n10_mux_dataout = sel_wire[0..0] & data_wire[21..21] # !(sel_wire[0..0]) & data_wire[20..20];
	l1_w0_n110_mux_dataout = sel_wire[0..0] & data_wire[221..221] # !(sel_wire[0..0]) & data_wire[220..220];
	l1_w0_n111_mux_dataout = sel_wire[0..0] & data_wire[223..223] # !(sel_wire[0..0]) & data_wire[222..222];
	l1_w0_n112_mux_dataout = sel_wire[0..0] & data_wire[225..225] # !(sel_wire[0..0]) & data_wire[224..224];
	l1_w0_n113_mux_dataout = sel_wire[0..0] & data_wire[227..227] # !(sel_wire[0..0]) & data_wire[226..226];
	l1_w0_n114_mux_dataout = sel_wire[0..0] & data_wire[229..229] # !(sel_wire[0..0]) & data_wire[228..228];
	l1_w0_n115_mux_dataout = sel_wire[0..0] & data_wire[231..231] # !(sel_wire[0..0]) & data_wire[230..230];
	l1_w0_n116_mux_dataout = sel_wire[0..0] & data_wire[233..233] # !(sel_wire[0..0]) & data_wire[232..232];
	l1_w0_n117_mux_dataout = sel_wire[0..0] & data_wire[235..235] # !(sel_wire[0..0]) & data_wire[234..234];
	l1_w0_n118_mux_dataout = sel_wire[0..0] & data_wire[237..237] # !(sel_wire[0..0]) & data_wire[236..236];
	l1_w0_n119_mux_dataout = sel_wire[0..0] & data_wire[239..239] # !(sel_wire[0..0]) & data_wire[238..238];
	l1_w0_n11_mux_dataout = sel_wire[0..0] & data_wire[23..23] # !(sel_wire[0..0]) & data_wire[22..22];
	l1_w0_n120_mux_dataout = sel_wire[0..0] & data_wire[241..241] # !(sel_wire[0..0]) & data_wire[240..240];
	l1_w0_n121_mux_dataout = sel_wire[0..0] & data_wire[243..243] # !(sel_wire[0..0]) & data_wire[242..242];
	l1_w0_n122_mux_dataout = sel_wire[0..0] & data_wire[245..245] # !(sel_wire[0..0]) & data_wire[244..244];
	l1_w0_n123_mux_dataout = sel_wire[0..0] & data_wire[247..247] # !(sel_wire[0..0]) & data_wire[246..246];
	l1_w0_n124_mux_dataout = sel_wire[0..0] & data_wire[249..249] # !(sel_wire[0..0]) & data_wire[248..248];
	l1_w0_n125_mux_dataout = sel_wire[0..0] & data_wire[251..251] # !(sel_wire[0..0]) & data_wire[250..250];
	l1_w0_n126_mux_dataout = sel_wire[0..0] & data_wire[253..253] # !(sel_wire[0..0]) & data_wire[252..252];
	l1_w0_n127_mux_dataout = sel_wire[0..0] & data_wire[255..255] # !(sel_wire[0..0]) & data_wire[254..254];
	l1_w0_n12_mux_dataout = sel_wire[0..0] & data_wire[25..25] # !(sel_wire[0..0]) & data_wire[24..24];
	l1_w0_n13_mux_dataout = sel_wire[0..0] & data_wire[27..27] # !(sel_wire[0..0]) & data_wire[26..26];
	l1_w0_n14_mux_dataout = sel_wire[0..0] & data_wire[29..29] # !(sel_wire[0..0]) & data_wire[28..28];
	l1_w0_n15_mux_dataout = sel_wire[0..0] & data_wire[31..31] # !(sel_wire[0..0]) & data_wire[30..30];
	l1_w0_n16_mux_dataout = sel_wire[0..0] & data_wire[33..33] # !(sel_wire[0..0]) & data_wire[32..32];
	l1_w0_n17_mux_dataout = sel_wire[0..0] & data_wire[35..35] # !(sel_wire[0..0]) & data_wire[34..34];
	l1_w0_n18_mux_dataout = sel_wire[0..0] & data_wire[37..37] # !(sel_wire[0..0]) & data_wire[36..36];
	l1_w0_n19_mux_dataout = sel_wire[0..0] & data_wire[39..39] # !(sel_wire[0..0]) & data_wire[38..38];
	l1_w0_n1_mux_dataout = sel_wire[0..0] & data_wire[3..3] # !(sel_wire[0..0]) & data_wire[2..2];
	l1_w0_n20_mux_dataout = sel_wire[0..0] & data_wire[41..41] # !(sel_wire[0..0]) & data_wire[40..40];
	l1_w0_n21_mux_dataout = sel_wire[0..0] & data_wire[43..43] # !(sel_wire[0..0]) & data_wire[42..42];
	l1_w0_n22_mux_dataout = sel_wire[0..0] & data_wire[45..45] # !(sel_wire[0..0]) & data_wire[44..44];
	l1_w0_n23_mux_dataout = sel_wire[0..0] & data_wire[47..47] # !(sel_wire[0..0]) & data_wire[46..46];
	l1_w0_n24_mux_dataout = sel_wire[0..0] & data_wire[49..49] # !(sel_wire[0..0]) & data_wire[48..48];
	l1_w0_n25_mux_dataout = sel_wire[0..0] & data_wire[51..51] # !(sel_wire[0..0]) & data_wire[50..50];
	l1_w0_n26_mux_dataout = sel_wire[0..0] & data_wire[53..53] # !(sel_wire[0..0]) & data_wire[52..52];
	l1_w0_n27_mux_dataout = sel_wire[0..0] & data_wire[55..55] # !(sel_wire[0..0]) & data_wire[54..54];
	l1_w0_n28_mux_dataout = sel_wire[0..0] & data_wire[57..57] # !(sel_wire[0..0]) & data_wire[56..56];
	l1_w0_n29_mux_dataout = sel_wire[0..0] & data_wire[59..59] # !(sel_wire[0..0]) & data_wire[58..58];
	l1_w0_n2_mux_dataout = sel_wire[0..0] & data_wire[5..5] # !(sel_wire[0..0]) & data_wire[4..4];
	l1_w0_n30_mux_dataout = sel_wire[0..0] & data_wire[61..61] # !(sel_wire[0..0]) & data_wire[60..60];
	l1_w0_n31_mux_dataout = sel_wire[0..0] & data_wire[63..63] # !(sel_wire[0..0]) & data_wire[62..62];
	l1_w0_n32_mux_dataout = sel_wire[0..0] & data_wire[65..65] # !(sel_wire[0..0]) & data_wire[64..64];
	l1_w0_n33_mux_dataout = sel_wire[0..0] & data_wire[67..67] # !(sel_wire[0..0]) & data_wire[66..66];
	l1_w0_n34_mux_dataout = sel_wire[0..0] & data_wire[69..69] # !(sel_wire[0..0]) & data_wire[68..68];
	l1_w0_n35_mux_dataout = sel_wire[0..0] & data_wire[71..71] # !(sel_wire[0..0]) & data_wire[70..70];
	l1_w0_n36_mux_dataout = sel_wire[0..0] & data_wire[73..73] # !(sel_wire[0..0]) & data_wire[72..72];
	l1_w0_n37_mux_dataout = sel_wire[0..0] & data_wire[75..75] # !(sel_wire[0..0]) & data_wire[74..74];
	l1_w0_n38_mux_dataout = sel_wire[0..0] & data_wire[77..77] # !(sel_wire[0..0]) & data_wire[76..76];
	l1_w0_n39_mux_dataout = sel_wire[0..0] & data_wire[79..79] # !(sel_wire[0..0]) & data_wire[78..78];
	l1_w0_n3_mux_dataout = sel_wire[0..0] & data_wire[7..7] # !(sel_wire[0..0]) & data_wire[6..6];
	l1_w0_n40_mux_dataout = sel_wire[0..0] & data_wire[81..81] # !(sel_wire[0..0]) & data_wire[80..80];
	l1_w0_n41_mux_dataout = sel_wire[0..0] & data_wire[83..83] # !(sel_wire[0..0]) & data_wire[82..82];
	l1_w0_n42_mux_dataout = sel_wire[0..0] & data_wire[85..85] # !(sel_wire[0..0]) & data_wire[84..84];
	l1_w0_n43_mux_dataout = sel_wire[0..0] & data_wire[87..87] # !(sel_wire[0..0]) & data_wire[86..86];
	l1_w0_n44_mux_dataout = sel_wire[0..0] & data_wire[89..89] # !(sel_wire[0..0]) & data_wire[88..88];
	l1_w0_n45_mux_dataout = sel_wire[0..0] & data_wire[91..91] # !(sel_wire[0..0]) & data_wire[90..90];
	l1_w0_n46_mux_dataout = sel_wire[0..0] & data_wire[93..93] # !(sel_wire[0..0]) & data_wire[92..92];
	l1_w0_n47_mux_dataout = sel_wire[0..0] & data_wire[95..95] # !(sel_wire[0..0]) & data_wire[94..94];
	l1_w0_n48_mux_dataout = sel_wire[0..0] & data_wire[97..97] # !(sel_wire[0..0]) & data_wire[96..96];
	l1_w0_n49_mux_dataout = sel_wire[0..0] & data_wire[99..99] # !(sel_wire[0..0]) & data_wire[98..98];
	l1_w0_n4_mux_dataout = sel_wire[0..0] & data_wire[9..9] # !(sel_wire[0..0]) & data_wire[8..8];
	l1_w0_n50_mux_dataout = sel_wire[0..0] & data_wire[101..101] # !(sel_wire[0..0]) & data_wire[100..100];
	l1_w0_n51_mux_dataout = sel_wire[0..0] & data_wire[103..103] # !(sel_wire[0..0]) & data_wire[102..102];
	l1_w0_n52_mux_dataout = sel_wire[0..0] & data_wire[105..105] # !(sel_wire[0..0]) & data_wire[104..104];
	l1_w0_n53_mux_dataout = sel_wire[0..0] & data_wire[107..107] # !(sel_wire[0..0]) & data_wire[106..106];
	l1_w0_n54_mux_dataout = sel_wire[0..0] & data_wire[109..109] # !(sel_wire[0..0]) & data_wire[108..108];
	l1_w0_n55_mux_dataout = sel_wire[0..0] & data_wire[111..111] # !(sel_wire[0..0]) & data_wire[110..110];