cpu.asm.rpt

用VHDL语言设计简单的CPU

Assembler report for cpu
Sun Mar 29 14:56:40 2009
Quartus II Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Assembler Summary
  3. Assembler Settings
  4. Assembler Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2007 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------+
; Assembler Summary                                             ;
+-----------------------+---------------------------------------+
; Assembler Status      ; Successful - Sun Mar 29 14:56:40 2009 ;
; Revision Name         ; cpu                                   ;
; Top-level Entity Name ; cpu                                   ;
; Family                ; Stratix II                            ;
; Device                ; EP2S15F484C3                          ;
+-----------------------+---------------------------------------+


+--------------------------------------------------------------------------------------------------------+
; Assembler Settings                                                                                     ;
+-----------------------------------------------------------------------------+----------+---------------+
; Option                                                                      ; Setting  ; Default Value ;
+-----------------------------------------------------------------------------+----------+---------------+
; Use smart compilation                                                       ; Off      ; Off           ;
; Maximum processors allowed for parallel compilation                         ; 1        ; 1             ;
; Generate compressed bitstreams                                              ; On       ; On            ;
; Compression mode                                                            ; Off      ; Off           ;
; Clock source for configuration device                                       ; Internal ; Internal      ;
; Clock frequency of the configuration device                                 ; 10 MHZ   ; 10 MHz        ;
; Divide clock frequency by                                                   ; 1        ; 1             ;
; JTAG user code for target device                                            ; Ffffffff ; Ffffffff      ;
; Auto user code                                                              ; Off      ; Off           ;
; Configuration device                                                        ; Auto     ; Auto          ;
; JTAG user code for configuration device                                     ; Ffffffff ; Ffffffff      ;
; Configuration device auto user code                                         ; Off      ; Off           ;
; Generate Tabular Text File (.ttf) For Target Device                         ; Off      ; Off           ;
; Generate Raw Binary File (.rbf) For Target Device                           ; Off      ; Off           ;
; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device ; Off      ; Off           ;
; Hexadecimal Output File start address                                       ; 0        ; 0             ;
; Hexadecimal Output File count direction                                     ; Up       ; Up            ;
; Release clears before tri-states                                            ; Off      ; Off           ;
; Auto-restart configuration after error                                      ; On       ; On            ;
; Maintain Compatibility with All Stratix II MRAM Versions                    ; Off      ; Off           ;
; Use Checkered Pattern as Uninitialized RAM Content                          ; Off      ; Off           ;
; Generate Serial Vector Format File (.svf) for Target Device                 ; Off      ; Off           ;
; Generate a JEDEC STAPL Format File (.jam) for Target Device                 ; Off      ; Off           ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off      ; Off           ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; On       ; On            ;
+-----------------------------------------------------------------------------+----------+---------------+


+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Assembler
    Info: Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version
    Info: Processing started: Sun Mar 29 14:56:39 2009
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off cpu -c cpu
Warning: Can't generate programming files because you are currently using the Quartus II software in Evaluation Mode
Info: Quartus II Assembler was successful. 0 errors, 1 warning
    Info: Allocated 128 megabytes of memory during processing
    Info: Processing ended: Sun Mar 29 14:56:40 2009
    Info: Elapsed time: 00:00:01