fpdivider24.vhd

是Nios II處理器下客製化指令的一個32位元浮點數除法器

-- hds header_start
--
-- VHDL Entity FPmix32.FPdivider24.symbol
--
-- Created:
--          by - kenboy.UNKNOWN (IBM-BVE1KE4DQ5P)
--          at - 20:26:23 2004/04/14
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2001.5 (Build 170)
--
-- hds header_end
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;


ENTITY FPdivider24 IS
   PORT( 
      inputa         : IN     std_logic_vector (23 DOWNTO 0);
      inputb         : IN     std_logic_vector (23 DOWNTO 0);
      final_result24 : OUT    std_logic_vector (27 DOWNTO 0)
   );

-- Declarations

END FPdivider24 ;

-- hds interface_end
--
-- VHDL Architecture FPmix32.FPdivider24.struct
--
-- Created:
--          by - kenboy.UNKNOWN (IBM-BVE1KE4DQ5P)
--          at - 20:26:24 2004/04/14
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2001.5 (Build 170)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;


--IBRARY FPmix32;

ARCHITECTURE struct OF FPdivider24 IS

   -- Architecture declarations

   -- Internal signal declarations
   SIGNAL X_value     : std_logic_vector(7 DOWNTO 0);
   SIGNAL answer      : std_logic_vector(47 DOWNTO 0);
   SIGNAL cube_answer : std_logic_vector(71 DOWNTO 0);
   SIGNAL result      : std_logic_vector(23 DOWNTO 0);
   SIGNAL result_ax   : std_logic_vector(29 DOWNTO 0);
   SIGNAL sout        : std_logic_vector(29 DOWNTO 0);


   -- Component Declarations
   COMPONENT cube24
   PORT (
      cube_a      : IN     std_logic_vector (23 DOWNTO 0);
      cube_answer : OUT    std_logic_vector (71 DOWNTO 0)
   );
   END COMPONENT;
   COMPONENT msub24_1bx_shell
   PORT (
      in_X   : IN     std_logic_vector (7 DOWNTO 0);
      in_b   : IN     std_logic_vector (23 DOWNTO 0);
      result : OUT    std_logic_vector (23 DOWNTO 0)
   );
   END COMPONENT;
   COMPONENT mult_ax
   PORT (
      in_a      : IN     std_logic_vector (23 DOWNTO 0);
      in_x      : IN     std_logic_vector (7 DOWNTO 0);
      result_ax : OUT    std_logic_vector (29 DOWNTO 0)
   );
   END COMPONENT;
   COMPONENT mult_final28
   PORT (
      in_ax          : IN     std_logic_vector (29 DOWNTO 0);
      in_s           : IN     std_logic_vector (29 DOWNTO 0);
      final_result24 : OUT    std_logic_vector (27 DOWNTO 0)
   );
   END COMPONENT;
   COMPONENT square24
   PORT (
      a      : IN     std_logic_vector (23 DOWNTO 0);
      answer : OUT    std_logic_vector (47 DOWNTO 0)
   );
   END COMPONENT;
   COMPONENT sum28_shell
   PORT (
      from_1bx  : IN     std_logic_vector (23 DOWNTO 0);
      from_1bx2 : IN     std_logic_vector (47 DOWNTO 0);
      from_1bx3 : IN     std_logic_vector (71 DOWNTO 0);
      sout      : OUT    std_logic_vector (29 DOWNTO 0)
   );
   END COMPONENT;
   COMPONENT table_shell
   PORT (
      inputb  : IN     std_logic_vector (23 DOWNTO 0);
      X_value : OUT    std_logic_vector (7 DOWNTO 0)
   );
   END COMPONENT;

   -- Optional embedded configurations
   -- pragma synthesis_off
--   FOR ALL : cube24 USE ENTITY FPmix32.cube24;
--   FOR ALL : msub24_1bx_shell USE ENTITY FPmix32.msub24_1bx_shell;
--   FOR ALL : mult_ax USE ENTITY FPmix32.mult_ax;
--   FOR ALL : mult_final28 USE ENTITY FPmix32.mult_final28;
--   FOR ALL : square24 USE ENTITY FPmix32.square24;
--   FOR ALL : sum28_shell USE ENTITY FPmix32.sum28_shell;
--   FOR ALL : table_shell USE ENTITY FPmix32.table_shell;
   -- pragma synthesis_on


BEGIN
   -- Instance port mappings.
   I2 : cube24
      PORT MAP (
         cube_a      => result,
         cube_answer => cube_answer
      );
   I0 : msub24_1bx_shell
      PORT MAP (
         in_X   => X_value,
         in_b   => inputb,
         result => result
      );
   I4 : mult_ax
      PORT MAP (
         in_a      => inputa,
         in_x      => X_value,
         result_ax => result_ax
      );
   I6 : mult_final28
      PORT MAP (
         in_ax          => sout,
         in_s           => result_ax,
         final_result24 => final_result24
      );
   I3 : square24
      PORT MAP (
         a      => result,
         answer => answer
      );
   I5 : sum28_shell
      PORT MAP (
         from_1bx  => result,
         from_1bx2 => answer,
         from_1bx3 => cube_answer,
         sout      => sout
      );
   I1 : table_shell
      PORT MAP (
         inputb  => inputb,
         X_value => X_value
      );

END struct;