controller_pack.vhd

一个8位微处理器的VHDL代码以及testbench

library ieee;
use ieee.std_logic_1164.all;

package controller_const is
  				-- BYTE-ORIENTED OPERATIONS --	
  constant ADDWF   : std_logic_vector (5 downto 0) := "000111";  -- O6
  constant ANDWF   : std_logic_vector (5 downto 0) := "000101";  -- Y6
  constant CLRF    : std_logic_vector (5 downto 0) := "000001";
  constant COMF    : std_logic_vector (5 downto 0) := "001001";  
  constant DECF    : std_logic_vector (5 downto 0) := "000011";
  constant DECFSZ  : std_logic_vector (5 downto 0) := "001011";  -- O6
  constant INCF    : std_logic_vector (5 downto 0) := "001010";  -- O6
  constant INCFSZ  : std_logic_vector (5 downto 0) := "001111";  
  constant IORWF   : std_logic_vector (5 downto 0) := "000100";
  constant SUBWF   : std_logic_vector (5 downto 0) := "000010";  -- O6
  constant XORWF   : std_logic_vector (5 downto 0) := "000110";  -- O6

            -- DATA MOVEMENT OPERATIONS -- 
  constant MOVF    : std_logic_vector (5 downto 0) := "001000";  -- O6
  constant MOVLW   : std_logic_vector (5 downto 0) := "110000";  -- O6
  constant MOVWF   : std_logic_vector (6 downto 0) := "0000001"; -- O7

  				-- BIT-ORIENTED OPERATIONS --
  constant BCF     : std_logic_vector (3 downto 0) := "0100";
  constant BSF     : std_logic_vector (3 downto 0) := "0101";  
  constant BTFSC   : std_logic_vector (3 downto 0) := "0110"; 
  constant BTFSS   : std_logic_vector (3 downto 0) := "0111";    -- O4
  
  				-- LITERAL AND CONTROL OPERATIONS--
  constant ADDLW   : std_logic_vector (5 downto 0) := "111110";  -- O6
  constant ANDLW   : std_logic_vector (5 downto 0) := "111001";  -- O6
  constant GOTO    : std_logic_vector (2 downto 0) := "101";     -- O3
  constant IORLW   : std_logic_vector (5 downto 0) := "111000";  -- Y6
  constant NOP     : std_logic_vector (6 downto 0) := "0000000"; -- O7
  constant SUBLW   : std_logic_vector (5 downto 0) := "111100";  -- O6
  constant XORLW   : std_logic_vector (5 downto 0) := "111010";  -- O6
  constant TRIS    : std_logic_vector (10 downto 0) := "00000001100";  -- O11
				  
  type state is (STATE_RESET, ID, EXE);				  
				  
end package controller_const;


library ieee;
use ieee.std_logic_1164.all;

package alu_const is
	constant alu_and	:	std_logic_vector(3 downto 0) := "0000"; -- 0
	constant alu_add	:	std_logic_vector(3 downto 0) := "0001"; -- 1
	constant alu_or 	:	std_logic_vector(3 downto 0) := "0010"; -- 2
	constant alu_com	:	std_logic_vector(3 downto 0) := "0011"; -- 3
	constant alu_xor	:	std_logic_vector(3 downto 0) := "0100"; -- 4	
	constant alu_sub	:	std_logic_vector(3 downto 0) := "0101"; -- 5
	constant alu_inc	:	std_logic_vector(3 downto 0) := "0110"; -- 6
	constant alu_dec	:	std_logic_vector(3 downto 0) := "0111"; -- 7
	constant alu_pass_a	:	std_logic_vector(3 downto 0) := "1000"; -- 8
	constant alu_pass_b	:	std_logic_vector(3 downto 0) := "1001"; -- 9
	constant alu_pass_z	:	std_logic_vector(3 downto 0) := "1010"; -- 10
	constant alu_bit_test:	std_logic_vector(3 downto 0) := "1011"; -- 11
end package alu_const;