program_memory.vhd

来自「一个8位微处理器的VHDL代码以及testbench」· VHDL 代码 · 共 37 行

library ieee;
use ieee.std_logic_1164.all; -- each module will need to use std_logic
use ieee.numeric_std.all;

entity program_memory is
	port(	addr: in std_logic_vector(12 downto 0);
		   data: out std_logic_vector(13 downto 0));
end entity program_memory;

architecture program_memory of program_memory is
begin

 data <="11000001101011" when addr = "0000000000000" else --MOVLW 
        "11100100000110" when addr = "0000000000001" else --ANDLW
        "11111000000110" when addr = "0000000000010" else --ADDLW
        "11100000000110" when addr = "0000000000011" else --IORLW
        "11110000000110" when addr = "0000000000100" else --SUBLW
        "11101000000110" when addr = "0000000000101" else --XORLW
        "00000010000101" when addr = "0000000000110" else --MOVWF
        "11000011111111" when addr = "0000000000111" else --MOVLW FF
        "00000001100101" when addr = "0000000001000" else --TRISA
        "00011110000101" when addr = "0000000001001" else --ADDWF PORTA
        "00101000000101" when addr = "0000000001010" else --INCF PORTA,0
        "00101010000101" when addr = "0000000001011" else --INCF PORTA,1
        "11000011001100" when addr = "0000000001100" else --MOVLW
        "00000010000000" when addr = "0000000001101" else --MOVWF
        "00100000000101" when addr = "0000000001110" else --MOVF PORTA
        "11000000000011" when addr = "0000000001111" else --MOVLW
        "00000010000000" when addr = "0000000010000" else --MOVWF
        "00101110000000" when addr = "0000000010001" else --DECFSZ
        "10100000010001" when addr = "0000000010010" else --GOTO above
        --"10100000000001" when addr = "0000000001010" else -- GOTO 1       
        "00000000000000";                              
                 
                 
end;