reg8.hif

通过VHDL实现4位全加器

Version 7.2 Build 151 09/26/2007 SJ Web Edition
7
2631
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
reg8
# storage
db|reg8.(0).cnf
db|reg8.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
reg8.vhd
48f10f9abb081624d30747cbc75614c
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
n
8
PARAMETER_SIGNED_DEC
DEF
}
# hierarchies {
|
}
# lmf
..|..|..|program|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# complete