assert_next_logic.sv

OVL——基于断言的verilog验证 Verilog数字系统设计:RTL综合、测试平台与验证

// Accellera Standard V1.0 Open Verification Library (OVL).
// Accellera Copyright (c) 2005. All rights reserved.

  parameter assert_name = "ASSERT_NEXT";

  `include "std_ovl_task.h"

  `ifdef OVL_INIT_MSG
    initial
      ovl_init_msg_t; // Call the User Defined Init Message Routine
  `endif

  initial begin
    if (num_cks <= 0) begin
      ovl_error_t("num_cks parameter<=0");
    end
  end

  reg pending = 0;
  integer i = 0;

  always @ (posedge clk) begin
    if (`OVL_RESET_SIGNAL != 1'b0) begin
      if (start_event == 1'b1) begin
        pending <= 1'b1;
        i <= num_cks;
      end 
      else if (pending) begin
        if (i != 1)
          i <= i - 1;
        else
          pending <= 1'b0;
      end
    end
    else begin
      pending <= 0;
      i <= 0;
    end
  end

  property ASSERT_NEXT_START_WITHOUT_TEST_P;
  @(posedge clk)
  disable iff (`OVL_RESET_SIGNAL != 1'b1)
  start_event |-> ##num_cks test_expr;
  endproperty

  property ASSERT_NEXT_TEST_WITHOUT_START_P;
  @(posedge clk)
  disable iff (`OVL_RESET_SIGNAL != 1'b1)
  not ((!start_event) ##num_cks test_expr);
  endproperty

  property ASSERT_NEXT_NO_OVERLAP_P;
  @(posedge clk)
  disable iff (`OVL_RESET_SIGNAL != 1'b1)
  start_event |-> (i <= 1);
  endproperty

`ifdef OVL_ASSERT_ON

  generate

    case (property_type)
      `OVL_ASSERT : begin
        if (num_cks > 0) begin
          assert property (ASSERT_NEXT_START_WITHOUT_TEST_P)
          else ovl_error_t("start_event without test_expr");

          if (check_missing_start) begin
            assert property (ASSERT_NEXT_TEST_WITHOUT_START_P)
            else ovl_error_t("test_expr without start_event");
          end
          if (!check_overlapping) begin
            assert property (ASSERT_NEXT_NO_OVERLAP_P)
            else ovl_error_t("illegal overlapping condition detected");
          end
        end
      end
      `OVL_ASSUME : begin
        if (num_cks > 0) begin
          M_ASSERT_NEXT_START_WITHOUT_TEST_P:
          assume property (ASSERT_NEXT_START_WITHOUT_TEST_P);

          if (check_missing_start) begin
            M_ASSERT_NEXT_TEST_WITHOUT_START_P:
            assume property (ASSERT_NEXT_TEST_WITHOUT_START_P);
          end
          if (!check_overlapping) begin
            M_ASSERT_NEXT_NO_OVERLAP_P:
            assume property (ASSERT_NEXT_NO_OVERLAP_P);
          end
        end
      end
      default     : ovl_error_t("");
    endcase

  endgenerate

`endif // OVL_ASSERT_ON

`ifdef OVL_COVER_ON

generate

  if (coverage_level != `OVL_COVER_NONE) begin

    cover_start_event:
    cover property (@(posedge clk) ( (`OVL_RESET_SIGNAL != 1'b0) &&
                                     start_event) )
                   ovl_cover_t("start_event covered");

    if (check_overlapping)
      cover_overlapping_start_events:
      cover property (@(posedge clk) ( (`OVL_RESET_SIGNAL != 1'b0) &&
                                       pending && start_event) )
                     ovl_cover_t("overlapping_start_events covered");
  end

endgenerate

`endif // OVL_COVER_ON