_primary.vhd

OFDM系统中FFT的Verilog HDL 语言实现。

library verilog;
use verilog.vl_types.all;
entity converse is
    port(
        clk             : in     vl_logic;
        ce              : in     vl_logic;
        reset           : in     vl_logic;
        done            : in     vl_logic;
        start_t         : in     vl_logic;
        finish          : out    vl_logic;
        addr_con        : out    vl_logic_vector(9 downto 0);
        count1024       : out    vl_logic_vector(10 downto 0);
        flag            : out    vl_logic
    );
end converse;