_primary.vhd

来自「OFDM系统中FFT的Verilog HDL 语言实现。」· VHDL 代码 · 共 11 行

library verilog;
use verilog.vl_types.all;
entity mult is
    port(
        clk             : in     vl_logic;
        x               : in     vl_logic_vector(31 downto 0);
        y               : in     vl_logic_vector(15 downto 0);
        \out\           : out    vl_logic_vector(30 downto 0)
    );
end mult;