📄 dpsk.hif

📁 用vhdl语言实现2DPSK数字传输
💻 HIF
字号:
Version 7.1 Build 156 04/30/2007 SJ Full Version
37
2173
OFF
OFF
OFF
OFF
ON
ON
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
DPSK
# storage
db|DPSK.(0).cnf
db|DPSK.(0).cnf
# case_insensitive
# source_file
DPSK.bdf
b9a24427dd3269a27f6ed8c6eb0716c
25
# hierarchies {
|
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lcdcont
# storage
db|DPSK.(1).cnf
db|DPSK.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|Creativity|lcdcont.vhd
149ca499d48cacaf9bab8581ffb6c3a3
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
asciiwidth
8
PARAMETER_UNKNOWN
USR
}
# hierarchies {
lcdcont:inst1
}
# lmf
d:|quartus7.0|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lcd
# storage
db|DPSK.(2).cnf
db|DPSK.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|Creativity|lcd.vhd
7ae572b334d6e78c2677dc14795a059
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
asciiwidth
8
PARAMETER_SIGNED_DEC
USR
 constraint(high)
15 downto 0
PARAMETER_STRING
USR
 constraint(low)
15 downto 0
PARAMETER_STRING
USR
 constraint(lcd_data)
7 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
lcdcont:inst1|lcd:mylcd
}
# lmf
d:|quartus7.0|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
clockdiv
# storage
db|DPSK.(3).cnf
db|DPSK.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|LCD|lcd_zifu|clockdiv.vhd
36be40c58f4588ff99bcf17f9bc399e0
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
lcdcont:inst1|clockdiv:div
}
# lmf
d:|quartus7.0|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
shifter
# storage
db|DPSK.(4).cnf
db|DPSK.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
..|LCD|lcd_zifu|shifter.vhd
cb9981176248b1e01dd530bf5f22cc3a
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
 constraint(qout)
15 downto 0
PARAMETER_STRING
USR
}
# hierarchies {
lcdcont:inst1|shifter:myshift_high
lcdcont:inst1|shifter:myshift_low
}
# lmf
d:|quartus7.0|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
DPSK_shell
# storage
db|DPSK.(5).cnf
db|DPSK.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|DPSK_shell.v
58ad152f8cbd664bcf4bedb8c964d83a
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
clk_div
# storage
db|DPSK.(6).cnf
db|DPSK.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|clk_div.v
cdfe81c6cd37491ff0abf8d6ee0de
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|clk_div:comb_5
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
key_buffer
# storage
db|DPSK.(7).cnf
db|DPSK.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|key_buffer.v
219983e216ef91392f4f58f435554469
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# user_parameter {
start
00
PARAMETER_UNSIGNED_BIN
DEF
s1
01
PARAMETER_UNSIGNED_BIN
DEF
s2
10
PARAMETER_UNSIGNED_BIN
DEF
s3
11
PARAMETER_UNSIGNED_BIN
DEF
}
# hierarchies {
DPSK_shell:inst|key_buffer:comb_6
DPSK_shell:inst|key_buffer:comb_11
DPSK_shell:inst|LCM_pre:comb_12|key_buffer:comb_42
DPSK_shell:inst|LCM_pre:comb_12|key_buffer:comb_43
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
generate_a
# storage
db|DPSK.(8).cnf
db|DPSK.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
generate_a.v
6ffcb45b872fbdc13ec73d1c369ac192
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|generate_a:comb_7
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
generate_m
# storage
db|DPSK.(9).cnf
db|DPSK.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
generate_m.v
8093959e6a761dc73dc97d835caf65
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|generate_m:comb_8
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
channel_choice
# storage
db|DPSK.(10).cnf
db|DPSK.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|channel_choice.v
90e080a6456af998fc4d98e8bc5855e
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|channel_choice:u1
DPSK_shell:inst|channel_choice:u2
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
modulate
# storage
db|DPSK.(11).cnf
db|DPSK.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|modulate.v
f889fa4775853c8c0c03ec98e658f9
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|modulate:comb_9
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
diff_code
# storage
db|DPSK.(12).cnf
db|DPSK.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|diff_code.v
a1f25e4c2a5de36e6386e2a2eb0729
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|modulate:comb_9|diff_code:comb_9
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
my_dff
# storage
db|DPSK.(13).cnf
db|DPSK.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|my_dff.v
5b6cd8db68db136c1ccb4a779f8845
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|modulate:comb_9|diff_code:comb_9|my_dff:comb_6
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
phase_counter
# storage
db|DPSK.(14).cnf
db|DPSK.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|phase_counter.v
c2f131a1258cdd5b89a575bf804743
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
my_syn_counter
# storage
db|DPSK.(15).cnf
db|DPSK.(15).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|my_syn_counter.v
e6b5c7d3c3a68dbd6f31be82642fbd
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|modulate:comb_9|phase_counter:comb_10|my_syn_counter:comb_10
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
phase_table
# storage
db|DPSK.(16).cnf
db|DPSK.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|phase_table.v
dedc3bc3afe633f48d866bd3fa13bdf
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|modulate:comb_9|phase_table:comb_11
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
demodulate
# storage
db|DPSK.(17).cnf
db|DPSK.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|demodulate.v
a573133040d9901af541b13ee33aa
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|demodulate:comb_10
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
shift_detect
# storage
db|DPSK.(18).cnf
db|DPSK.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|shift_detect.v
a6d42beaf33fc9e6bdf8709030ef7a6e
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|demodulate:comb_10|shift_detect:comb_4
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
my_shift_reg
# storage
db|DPSK.(19).cnf
db|DPSK.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|my_shift_reg.v
ddc3168d78ee2149f0aecf783c14b58
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|demodulate:comb_10|shift_detect:comb_4|my_shift_reg:comb_6
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
pass_buffer
# storage
db|DPSK.(20).cnf
db|DPSK.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|pass_buffer.v
1d7e1bb11fe5d71d95c47cd084d7536c
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|pass_buffer:u5
DPSK_shell:inst|pass_buffer:u6
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_4
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_5
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_6
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_7
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_8
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_9
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_10
DPSK_shell:inst|pass_buffer_8bit:u7|pass_buffer:comb_11
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
pass_buffer_8bit
# storage
db|DPSK.(21).cnf
db|DPSK.(21).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|pass_buffer_8bit.v
6129e57dfa349d85c4db8f115c797a7d
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|pass_buffer_8bit:u7
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
dig_display
# storage
db|DPSK.(22).cnf
db|DPSK.(22).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|dig_display.v
f5e097b6eaca387785cbf918739f83f
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|dig_display:u3
DPSK_shell:inst|dig_display:u4
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
LCM_pre
# storage
db|DPSK.(23).cnf
db|DPSK.(23).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
..|Creativity|LCM_pre.v
53fd1ff5cc9b8442fb7bbd573159ea
7
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
DPSK_shell:inst|LCM_pre:comb_12
}
# lmf
d:|quartus7.0|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# complete
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