elc_clock.v

verilog实践 elc_clock 电子时钟设计

//11wolf 3.23
//可调的电子时钟
//3个按键分别设置各个时间参数
//3.26 修改   添加按键
module elc_clock(clk,segcs,segdata,key0,key1,key2,reset);
output[7:0]segcs,segdata;
input clk,reset;
input key0,key1,key2;
//wire[2:0]key;
reg[7:0]segcs,segdata;
reg clk1s,clk1ms;
reg[24:0]count1ms,count1s;
reg[6:0]hour,minute,second,hour1,minute1,second1;
reg[3:0]number;//用于扫描
reg[2:0]meun;
reg[20:0] cnt;
reg out_r1,out_r2;
initial 
   begin 
    clk1s=0;
    clk1ms=0;
    meun=0;
   end
/*******获取1MS的信号*********/
always@(posedge clk)
  begin 
    if(count1ms>25'd1000_0)//1ms的时间
      begin
      clk1ms<=~clk1ms;
      count1ms<=0;
      end
    else
      count1ms<=count1ms+1;
  end
 /*******获取1S的信号*********/
always@(posedge clk)
  begin 
    if(count1s>25'd1000_0000)//1ms的时间
      begin
      clk1s<=~clk1s;
      count1s<=0;
      end
    else
      count1s<=count1s+1;
  end  
/**************按键函数,消抖200MS**************/
always @(posedge clk)
begin
	if((key0&&key1)==1)     //一旦出现高电平即复位计数器
	begin
	    cnt <= 20'h0;     //清0计数器
	    out_r1 <= 1'h1;
	    out_r2 <= 1'h1;
	end
	else                  //低电平开始计数
	begin
		if(cnt >= 21'd2000_000) //CLK=20M，200ms 
		 begin 
		    if(key0 == 1'h0)//如果是按下SW0
		     begin
		      cnt=0;
		      out_r1 <= 1'h0;
		      if(second1==60)  second1<=0;
		      else   second1<=second1+1;
		     end  
		    else if(key1==1'h0)//如果是按下SW1  
		     begin 
		       cnt=0; 
		       out_r2 <= 1'h0;
		       if(minute1==60)  minute1<=0;
		       else   minute1<=minute1+1;
		     end
		    else  
		     begin
		       out_r1 <= 1'h1;
		       out_r2 <= 1'h1;
		     end	
		 end            
 		 else          
		      begin
			  cnt <= cnt + 20'h1;//计数器累加    
		      end
	 end
 end
/******分、秒、小时进位关系*****/
always@(posedge clk1s)
  begin 
    if(!reset)
      begin
       hour<=0;
       minute<=0;
       second<=0;
      end
    else 
         begin
         second<=second+1;
         if(second==59)
         begin
           second<=0;
           minute<=minute+1;
           if(minute==59)
            begin
             minute<=0;
             hour<=hour+1;
             if(hour==59)  hour<=0;
            end
          end
        end
  end
/******段选函数*********/
function[7:0] leddata;//返回一个8位的数字
input[3:0]  datain;
begin
  case(datain)
    4'd0: leddata=8'b11000000;//0
    4'd1: leddata=8'b11111001;//1
 	4'd2: leddata=8'b10100100;//2
    4'd3: leddata=8'b10110000;//3
    4'd4: leddata=8'b10011001;//4
    4'd5: leddata=8'b10010010;//5
    4'd6: leddata=8'b10000010;//6
    4'd7: leddata=8'b11111000;//7
    4'd8: leddata=8'b10000000;//8
    4'd9: leddata=8'b10010000;//9
    4'd10: leddata=8'b10111111;//-
    4'd11: leddata=8'b01111111;//.
    default:leddata=8'bzzzz_zzzz;
   endcase
end
endfunction
/********扫描函数*************/
always@(posedge clk1ms)
 begin
    if(number==8) number<=0;
    else 
    begin 
	    number<=number+1;
	    case(number) 
	     4'd0:
	        begin
	        segdata<=leddata(second%10);
	        segcs<=8'b0000_0001;//
	        end
	     4'd1:
	        begin
	        segdata<=leddata(second/10);
	        segcs<=8'b0000_0010;//
	        end
	     4'd2:
	        begin
	        segdata<=leddata(4'd10);//显示--
	        segcs<=8'b0000_0100;//
	        end
	     4'd3:
	        begin
	        segdata<=leddata(minute%10);
	        segcs<=8'b0000_1000;//
	        end
	     4'd4:
	        begin
	        segdata<=leddata(minute/10);
	        segcs<=8'b0001_0000;//
	        end
	     4'd5:
	        begin
	        segdata<=leddata(4'd10);
	        segcs<=8'b0010_0000;//
	        end
	     4'd6:
	        begin
	        segdata<=leddata(hour%10);
	        segcs<=8'b0100_0000;//
	        end
	     4'd7:
	        begin
	        segdata<=leddata(hour/10);
	        segcs<=8'b1000_0000;//
	        end
	   /*  4'd8:
	        begin
	        if(meun==1)
	        begin 
	         segdata<=leddata(4'd11);
	         segcs<=8'b0000_0001;//小数点在1位,表示调秒
	         end 
	       else
	        if(meun==2)
	         begin 
	         segdata<=leddata(4'd11);
	         segcs<=8'b0000_1000;//小数点在4位,表示调分
	         end
	        else
	        if(meun==3)
	         begin 
	         segdata<=leddata(4'd11);
	         segcs<=8'b0100_0000;//小数点在7位,表示调时
	         end
	        end*/
	     default:
	        begin
	        segdata<=8'bxxxx_xxxx;
	        segcs<=8'bxxxx_xxxx;
	        end 
		endcase
	end
end
endmodule