elc_clock.hif

verilog实践 elc_clock 电子时钟设计

Version 6.1 Build 201 11/27/2006 SJ Full Version
35
1916
OFF
OFF
OFF
OFF
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
lpm_divide_htl
# storage
db|elc_clock.(2).cnf
db|elc_clock.(2).cnf
# case_insensitive
# source_file
db|lpm_divide_htl.tdf
ca3bc9489c46f27f9c6934c893ca9412
6
# used_port {
remain3
-1
3
remain2
-1
3
remain1
-1
3
remain0
-1
3
numer6
-1
3
numer5
-1
3
numer4
-1
3
numer3
-1
3
numer2
-1
3
numer1
-1
3
numer0
-1
3
denom3
-1
3
denom2
-1
3
denom1
-1
3
denom0
-1
3
}
# end
# entity
sign_div_unsign_akh
# storage
db|elc_clock.(3).cnf
db|elc_clock.(3).cnf
# case_insensitive
# source_file
db|sign_div_unsign_akh.tdf
255365615ecbff571c2caec7f7c4ba42
6
# used_port {
remainder3
-1
3
remainder2
-1
3
remainder1
-1
3
remainder0
-1
3
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient3
-1
3
quotient2
-1
3
quotient1
-1
3
quotient0
-1
3
numerator6
-1
3
numerator5
-1
3
numerator4
-1
3
numerator3
-1
3
numerator2
-1
3
numerator1
-1
3
numerator0
-1
3
denominator3
-1
3
denominator2
-1
3
denominator1
-1
3
denominator0
-1
3
}
# end
# entity
alt_u_div_4oe
# storage
db|elc_clock.(4).cnf
db|elc_clock.(4).cnf
# case_insensitive
# source_file
db|alt_u_div_4oe.tdf
8b6ae33712eea6669336d3bf11bdc85
6
# used_port {
remainder3
-1
3
remainder2
-1
3
remainder1
-1
3
remainder0
-1
3
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient3
-1
3
quotient2
-1
3
quotient1
-1
3
quotient0
-1
3
numerator6
-1
3
numerator5
-1
3
numerator4
-1
3
numerator3
-1
3
numerator2
-1
3
numerator1
-1
3
numerator0
-1
3
denominator3
-1
3
denominator2
-1
3
denominator1
-1
3
denominator0
-1
3
}
# end
# entity
add_sub_3dc
# storage
db|elc_clock.(5).cnf
db|elc_clock.(5).cnf
# case_insensitive
# source_file
db|add_sub_3dc.tdf
3f95ef51b5d2f43997c43255546646dc
6
# used_port {
result0
-1
3
datab0
-1
3
dataa0
-1
3
cout
-1
3
}
# end
# entity
add_sub_4dc
# storage
db|elc_clock.(6).cnf
db|elc_clock.(6).cnf
# case_insensitive
# source_file
db|add_sub_4dc.tdf
fc14db19b038f5d58b31fc8bc91aeb95
6
# used_port {
result1
-1
3
result0
-1
3
datab1
-1
3
datab0
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# end
# entity
add_sub_5dc
# storage
db|elc_clock.(7).cnf
db|elc_clock.(7).cnf
# case_insensitive
# source_file
db|add_sub_5dc.tdf
f8a774e8e6962b286ab6f52763cbcc63
6
# used_port {
result2
-1
3
result1
-1
3
result0
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# end
# entity
add_sub_6dc
# storage
db|elc_clock.(8).cnf
db|elc_clock.(8).cnf
# case_insensitive
# source_file
db|add_sub_6dc.tdf
767b4ad2f85a2d2ec676118c937d3c30
6
# used_port {
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# end
# entity
add_sub_7dc
# storage
db|elc_clock.(9).cnf
db|elc_clock.(9).cnf
# case_insensitive
# source_file
db|add_sub_7dc.tdf
e499365914755e1f92ce3c32724e
6
# used_port {
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# end
# entity
add_sub_59c
# storage
db|elc_clock.(10).cnf
db|elc_clock.(10).cnf
# case_insensitive
# source_file
db|add_sub_59c.tdf
f2eef5d34f5b1d845c6bc968df64d2e
6
# used_port {
datab3
-1
3
datab2
-1
3
datab1
-1
3
datab0
-1
3
dataa3
-1
3
dataa2
-1
3
dataa1
-1
3
dataa0
-1
3
cin
-1
3
}
# end
# entity
lpm_divide_e5m
# storage
db|elc_clock.(12).cnf
db|elc_clock.(12).cnf
# case_insensitive
# source_file
db|lpm_divide_e5m.tdf
35dce64f82ae66be1c2828819b6a1975
6
# used_port {
quotient6
-1
3
quotient5
-1
3
quotient4
-1
3
quotient3
-1
3
quotient2
-1
3
quotient1
-1
3
quotient0
-1
3
numer6
-1
3
numer5
-1
3
numer4
-1
3
numer3
-1
3
numer2
-1
3
numer1
-1
3
numer0
-1
3
denom3
-1
3
denom2
-1
3
denom1
-1
3
denom0
-1
3
}
# end
# entity
elc_clock
# storage
db|elc_clock.(0).cnf
db|elc_clock.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
elc_clock.v
39c96ed13a8f765ff0210dac57c0c6
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
IGNORE_VERILOG_INITIAL_CONSTRUCTS
OFF
}
# hierarchies {
|
}
# end
# entity
lpm_divide
# storage
db|elc_clock.(1).cnf
db|elc_clock.(1).cnf
# case_insensitive
# source_file
..|..|..|..|altera|61|quartus|libraries|megafunctions|lpm_divide.tdf
c8c3bc3961c1baf5cea9b7d6a51c126e
6
# user_parameter {
LPM_WIDTHN
7
PARAMETER_UNKNOWN
USR
LPM_WIDTHD
4
PARAMETER_UNKNOWN
USR
LPM_NREPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_DREPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
LPM_REMAINDERPOSITIVE
TRUE
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
lpm_divide_htl
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
remain3
-1
3
remain2
-1
3
remain1
-1
3
remain0
-1
3
numer6
-1
3
numer5
-1
3
numer4
-1
3
numer3
-1
3
numer2
-1
3
numer1
-1
3
numer0
-1
3
denom2
-1
1
denom0
-1
1
denom3
-1
2
denom1
-1
2
}
# include_file {
..|..|..|..|altera|61|quartus|libraries|megafunctions|abs_divider.inc
cdfefd53e136b3a8e541899b82db37d
..|..|..|..|altera|61|quartus|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
..|..|..|..|altera|61|quartus|libraries|megafunctions|sign_div_unsign.inc
c1e17922387cb5d0c88d7fb673544bb4
}
# end
# entity
lpm_divide
# storage
db|elc_clock.(11).cnf
db|elc_clock.(11).cnf
# case_insensitive
# source_file
..|..|..|..|altera|61|quartus|libraries|megafunctions|lpm_divide.tdf
c8c3bc3961c1baf5cea9b7d6a51c126e
6
# user_parameter {
LPM_WIDTHN
7
PARAMETER_UNKNOWN
USR
LPM_WIDTHD
4
PARAMETER_UNKNOWN
USR
LPM_NREPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_DREPRESENTATION
UNSIGNED
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
LPM_REMAINDERPOSITIVE
TRUE
PARAMETER_UNKNOWN
DEF
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
lpm_divide_e5m
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
quotient3
-1
3
quotient2
-1
3
quotient1
-1
3
quotient0
-1
3
numer6
-1
3
numer5
-1
3
numer4
-1
3
numer3
-1
3
numer2
-1
3
numer1
-1
3
numer0
-1
3
denom2
-1
1
denom0
-1
1
denom3
-1
2
denom1
-1
2
}
# include_file {
..|..|..|..|altera|61|quartus|libraries|megafunctions|abs_divider.inc
cdfefd53e136b3a8e541899b82db37d
..|..|..|..|altera|61|quartus|libraries|megafunctions|aglobal61.inc
b513fb574ceb8f5886cd4ba429e82ec
..|..|..|..|altera|61|quartus|libraries|megafunctions|sign_div_unsign.inc
c1e17922387cb5d0c88d7fb673544bb4
}
# end
# complete