elc_clock.fit.summary

来自「verilog实践 elc_clock 电子时钟设计」· SUMMARY 代码 · 共 13 行

Fitter Status : Successful - Fri Apr 13 17:21:32 2007
Quartus II Version : 6.1 Build 201 11/27/2006 SJ Full Version
Revision Name : elc_clock
Top-level Entity Name : elc_clock
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Total logic elements : 489 / 2,910 ( 17 % )
Total pins : 21 / 104 ( 20 % )
Total virtual pins : 0
Total memory bits : 0 / 59,904 ( 0 % )
Total PLLs : 0 / 1 ( 0 % )