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VGA的verilog hdl 程序

wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[19] ;
wire \auto_signaltap_0|trigger_in_reg ;
wire \auto_signaltap_0|ela_control|\trigger_in_trigger_module_enabled_gen:trigger_in_match|\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~206 ;
wire \auto_signaltap_0|ela_control|\trigger_in_trigger_module_enabled_gen:trigger_in_match|\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|p_match_out~207 ;
wire \auto_signaltap_0|ela_control|\trigger_in_trigger_module_enabled_gen:trigger_in_match|\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|match_out ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|process0~19 ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|trigger_happened_ff[0] ;
wire \sld_hub_inst|IRSR_D[3]~402 ;
wire \sld_hub_inst|IRSR|Q[3] ;
wire \sld_hub_inst|instruction_decoder|auto_generated|w_anode1w[3] ;
wire \sld_hub_inst|instruction_decoder|auto_generated|dffe1a[0] ;
wire \sld_hub_inst|hub_tdo~277 ;
wire \sld_hub_inst|hub_tdo~278 ;
wire \sld_hub_inst|hub_tdo~282 ;
wire \sld_hub_inst|IRSR_D[4]~404 ;
wire \sld_hub_inst|IRSR|Q[4] ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[4]~feeder ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[4] ;
wire \sld_hub_inst|IRF_D[1][4]~42 ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[4] ;
wire \sld_hub_inst|jtag_debug_mode~171 ;
wire \sld_hub_inst|jtag_debug_mode~172 ;
wire \sld_hub_inst|jtag_debug_mode ;
wire \sld_hub_inst|node_ena~18 ;
wire \auto_signaltap_0|bypass_reg_out ;
wire \sld_hub_inst|hub_tdo~275 ;
wire \sld_hub_inst|IRSR_ENA ;
wire \sld_hub_inst|IRSR|Q[7] ;
wire \sld_hub_inst|IRSR_D[6]~409 ;
wire \sld_hub_inst|IRSR|Q[6] ;
wire \sld_hub_inst|IRSR_D[5]~403 ;
wire \sld_hub_inst|IRSR|Q[5] ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[5]~feeder ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[5] ;
wire \sld_hub_inst|IRF_D[1][5]~41 ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[5] ;
wire \sld_hub_inst|hub_tdo~276 ;
wire \sld_hub_inst|hub_tdo~283 ;
wire \sld_hub_inst|jtag_state_machine|state~13 ;
wire \sld_hub_inst|hub_tdo ;
wire \sld_hub_inst|hub_tdo~285 ;
wire \altera_internal_jtag~TDO ;

wire [2:0] \inst4|altpll_component|pll_CLK_bus ;
wire [1:0] \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a0_PORTADATAOUT_bus ;
wire [1:0] \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a1_PORTADATAOUT_bus ;
wire [1:0] \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a3_PORTADATAOUT_bus ;

assign \inst4|altpll_component|_clk0  = \inst4|altpll_component|pll_CLK_bus [0];
assign \inst4|altpll_component|_clk1  = \inst4|altpll_component|pll_CLK_bus [1];
assign \inst4|altpll_component|_clk2  = \inst4|altpll_component|pll_CLK_bus [2];

assign \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|q_a[0]  = \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a0_PORTADATAOUT_bus [0];
assign \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|q_a[5]  = \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a0_PORTADATAOUT_bus [1];

assign \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|q_a[1]  = \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a1_PORTADATAOUT_bus [0];
assign \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|q_a[2]  = \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a1_PORTADATAOUT_bus [1];

assign \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|q_a[3]  = \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a3_PORTADATAOUT_bus [0];
assign \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|q_a[4]  = \auto_signaltap_0|\stp_non_zero_ram_gen:stp_buffer_ram|auto_generated|altsyncram1|ram_block2a3_PORTADATAOUT_bus [1];

// atom is at LCFF_X22_Y8_N11
cycloneii_lcell_ff \inst|vcnt[4]~I (
	.clk(!\inst|hsyncint~clkctrl ),
	.datain(\inst|vcnt[4]~251 ),
	.sdata(),
	.aclr(!\rst~combout ),
	.sclr(\inst|LessThan~988 ),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(\inst|vcnt[4] ));

// atom is at JTAG_X1_Y19_N0
cycloneii_jtag \altera_internal_jtag~I (
	.tms(\altera_reserved_tms~combout ),
	.tck(\altera_reserved_tck~combout ),
	.tdi(\altera_reserved_tdi~combout ),
	.ntrst(),
	.tdoutap(),
	.tdouser(\sld_hub_inst|hub_tdo~285 ),
	.tdo(\altera_internal_jtag~TDO ),
	.tmsutap(\altera_internal_jtag~TMSUTAP ),
	.tckutap(\altera_internal_jtag~TCKUTAP ),
	.tdiutap(altera_internal_jtag),
	.shiftuser(),
	.clkdruser(),
	.updateuser(),
	.runidleuser(),
	.usr1user());

// atom is at LCCOMB_X23_Y8_N26
cycloneii_lcell_comb \inst|always1~295_I (
// Equation(s):
// \inst|always1~295  = \inst|hcnt[3]  & (\inst|hcnt[2]  # \inst|hcnt[1]  & \inst|hcnt[0] )

	.dataa(\inst|hcnt[1] ),
	.datab(\inst|hcnt[3] ),
	.datac(\inst|hcnt[0] ),
	.datad(\inst|hcnt[2] ),
	.cin(gnd),
	.combout(\inst|always1~295 ),
	.cout());
// synopsys translate_off
defparam \inst|always1~295_I .sum_lutc_input = "datac";
defparam \inst|always1~295_I .lut_mask = 16'hCC80;
// synopsys translate_on

// atom is at LCCOMB_X23_Y8_N10
cycloneii_lcell_comb \inst|always1~296_I (
// Equation(s):
// \inst|always1~296  = \inst|hcnt[6]  & (\inst|hcnt[5]  # \inst|hcnt[4]  # \inst|always1~295 )

	.dataa(\inst|hcnt[6] ),
	.datab(\inst|hcnt[5] ),
	.datac(\inst|hcnt[4] ),
	.datad(\inst|always1~295 ),
	.cin(gnd),
	.combout(\inst|always1~296 ),
	.cout());
// synopsys translate_off
defparam \inst|always1~296_I .sum_lutc_input = "datac";
defparam \inst|always1~296_I .lut_mask = 16'hAAA8;
// synopsys translate_on

// atom is at LCCOMB_X22_Y8_N10
cycloneii_lcell_comb \inst|vcnt[4]~251_I (
// Equation(s):
// \inst|vcnt[4]~251  = \inst|vcnt[4]  & (\inst|vcnt[3]~250  $ GND) # !\inst|vcnt[4]  & !\inst|vcnt[3]~250  & VCC
// \inst|vcnt[4]~252  = CARRY(\inst|vcnt[4]  & !\inst|vcnt[3]~250 )

	.dataa(\inst|vcnt[4] ),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.cin(\inst|vcnt[3]~250 ),
	.combout(\inst|vcnt[4]~251 ),
	.cout(\inst|vcnt[4]~252 ));
// synopsys translate_off
defparam \inst|vcnt[4]~251_I .sum_lutc_input = "cin";
defparam \inst|vcnt[4]~251_I .lut_mask = 16'hA50A;
// synopsys translate_on

// atom is at LCCOMB_X23_Y8_N16
cycloneii_lcell_comb \inst|LessThan~986_I (
// Equation(s):
// \inst|LessThan~986  = \inst|vcnt[4]  & \inst|vcnt[6] 

	.dataa(\inst|vcnt[4] ),
	.datab(vcc),
	.datac(vcc),
	.datad(\inst|vcnt[6] ),
	.cin(gnd),
	.combout(\inst|LessThan~986 ),
	.cout());
// synopsys translate_off
defparam \inst|LessThan~986_I .sum_lutc_input = "datac";
defparam \inst|LessThan~986_I .lut_mask = 16'hAA00;
// synopsys translate_on

// atom is at LCFF_X50_Y15_N25
cycloneii_lcell_ff \auto_signaltap_0|\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[0]~I (
	.clk(\altera_internal_jtag~TCKUTAPclkctrl ),
	.datain(\auto_signaltap_0|\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|_~1313 ),
	.sdata(),
	.aclr(\auto_signaltap_0|reset_all~clkctrl ),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.devclrn(devclrn),
	.devpor(devpor),
	.regout(\auto_signaltap_0|\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|info_data_shift_out|dffs[0] ));

// atom is at LCFF_X35_Y16_N13
cycloneii_lcell_ff \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[0]~I (
	.clk(\altera_internal_jtag~TCKUTAPclkctrl ),
	.datain(gnd),
	.sdata(\auto_signaltap_0|ela_contro