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VGA的verilog hdl 程序

wire \sld_hub_inst|HUB_INFO_REG|WORD_SR[1] ;
wire \sld_hub_inst|HUB_INFO_REG|WORD_SR[0] ;
wire \sld_hub_inst|HUB_BYPASS_REG~18 ;
wire \sld_hub_inst|HUB_BYPASS_REG ;
wire \sld_hub_inst|jtag_debug_mode~2 ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[18]~feeder ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[3]~feeder ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|is_buffer_wrapped_once~feeder ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita0 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita0 ;
wire \auto_signaltap_0|ela_control|sm1|post_trigger_count_enable~113 ;
wire \auto_signaltap_0|ela_control|sm1|post_trigger_count_enable ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[0] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita0~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita1 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[1] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita1~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita2~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita3 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[3] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita3~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita4~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita5~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita6 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[6] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita6~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita7~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita8 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[8] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita8~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita9 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[9] ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|stop_acquisition~100 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita9~COUT ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|counter_comb_bita10 ;
wire \auto_signaltap_0|ela_control|\gen_non_zero_sample_depth:tc1|post_trigger_counter|auto_generated|pre_hazard[10] ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[1]~feeder ;
wire \sld_hub_inst|OK_TO_UPDATE_IR_Q~0 ;
wire \sld_hub_inst|process2~0 ;
wire \sld_hub_inst|OK_TO_UPDATE_IR_Q ;
wire \sld_hub_inst|IRF_ENA_ENABLE~21 ;
wire \sld_hub_inst|IRF_ENA|Q[0] ;
wire \sld_hub_inst|GEN_SHADOW_IRF~0 ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[1] ;
wire \sld_hub_inst|IRF_D[1][1]~44 ;
wire \sld_hub_inst|IRF_ENABLE[1]~77 ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[1] ;
wire \auto_signaltap_0|ela_control|sm1|post_trigger_count_enable~112 ;
wire \auto_signaltap_0|ela_control|sm1|buffer_write_enable ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|is_buffer_wrapped~0 ;
wire \auto_signaltap_0|ela_control|buffer_write_addr_adv_ena_int~53 ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|safe_q[0] ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita0~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita1~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita2 ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|safe_q[2] ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita2~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita3~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita4~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita5 ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|safe_q[5] ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita5~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita6~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita7 ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|safe_q[7] ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita7~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita8~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita9 ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|safe_q[9] ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita9~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita10~COUT ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|\write_address_non_zero_gen:write_pointer_counter|auto_generated|counter_comb_bita10~9 ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|is_buffer_wrapped_once ;
wire \auto_signaltap_0|ela_control|sm2|status_out~110 ;
wire \auto_signaltap_0|ela_control|sm2|status_out[1] ;
wire \auto_signaltap_0|sld_acquisition_buffer_inst|trigger_write_addr_latch_ena~50 ;
wire \sld_hub_inst|IRSR_D[1]~408 ;
wire \sld_hub_inst|jtag_state_machine|state~10 ;
wire \sld_hub_inst|jtag_state_machine|state[3] ;
wire \sld_hub_inst|IRSR|Q[0]~118 ;
wire \sld_hub_inst|IRSR|Q[1] ;
wire \sld_hub_inst|instruction_decoder|auto_generated|w_anode78w[3] ;
wire \sld_hub_inst|comb~66 ;
wire \sld_hub_inst|comb~67 ;
wire \sld_hub_inst|instruction_decoder|auto_generated|dffe1a[7] ;
wire \sld_hub_inst|instruction_decoder|auto_generated|w_anode18w[3] ;
wire \sld_hub_inst|instruction_decoder|auto_generated|dffe1a[1] ;
wire \sld_hub_inst|comb~68 ;
wire \sld_hub_inst|IRF_ENA_0|Q[0]~3 ;
wire \sld_hub_inst|IRF_ENA_0|Q[0] ;
wire \sld_hub_inst|BROADCAST_ENA~27 ;
wire \sld_hub_inst|BROADCAST|Q[0] ;
wire \sld_hub_inst|comb~6 ;
wire \sld_hub_inst|RESET|Q[0] ;
wire \sld_hub_inst|CLEAR_SIGNAL~0 ;
wire \sld_hub_inst|CLEAR_SIGNAL~0clkctrl ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[3] ;
wire \sld_hub_inst|IRF_D[1][3]~40 ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[3] ;
wire \auto_signaltap_0|sdr~13 ;
wire \auto_signaltap_0|ela_control|trigger_setup_ena ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[18] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[17]~feeder ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[17] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[16]~feeder ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[16] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[15]~feeder ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[15] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[14]~feeder ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[14] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[13] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[12] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[11] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[10] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[9] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[8] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[7] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[6] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[5] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[4] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[3] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[2] ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|trigger_happened~117 ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|trigger_happened_ff[1]~feeder ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[1]~clkctrl ;
wire \auto_signaltap_0|acq_trigger_in_reg[4]~33 ;
wire \auto_signaltap_0|acq_trigger_in_reg[4] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|holdff ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|p_match_out~207 ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:4:sm1|match_out ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|p_match_out~63 ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:3:sm1|match_out ;
wire \auto_signaltap_0|acq_trigger_in_reg[1] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~171 ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|p_match_out~172 ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|\trigger_modules_gen:0:trigger_match|\gen_sbpmg_pipeline_less_than_two:sm0:2:sm1|match_out ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|trigger_happened~116 ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|trigger_happened_ff[1] ;
wire \auto_signaltap_0|ela_control|ela_level_seq_mgr|trigger_happened~118 ;
wire \auto_signaltap_0|ela_control|sm2|status_out~111 ;
wire \auto_signaltap_0|ela_control|sm2|status_out[0] ;
wire \auto_signaltap_0|ela_control|ela_status~77 ;
wire \sld_hub_inst|IRSR_D[0]~401 ;
wire \sld_hub_inst|IRSR|Q[0] ;
wire \sld_hub_inst|\GEN_SHADOW_IRF:1:S_IRF|Q[0] ;
wire \sld_hub_inst|IRF_D[1][0]~43 ;
wire \sld_hub_inst|\GEN_IRF:1:IRF|Q[0] ;
wire \auto_signaltap_0|reset_all ;
wire \auto_signaltap_0|reset_all~clkctrl ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[17] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[16] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[15] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[14] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[13] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[12] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[11] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[10] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[9]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[9] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[8] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[7] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[6] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[5] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[4] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[3] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[2] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[1] ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0]~feeder ;
wire \auto_signaltap_0|ela_control|\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|trigger_condition_deserialize|dffs[0] ;
wire \auto_signaltap_0|ela_control|trigger_config_deserialize|dffs[19]~feeder ;