ad0809.hif

用verilog写的对ad0809的控制

common_ip_version
0
PARAMETER_SIGNED_DEC
USR
 constraint(jtag_state)
15 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
LPM_SHIFTREG
# storage
db|ad0809.(36).cnf
db|ad0809.(36).cnf
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|LPM_SHIFTREG.tdf
c5ab523d1aaaec8081935aa7394e8f66
6
# user_parameter {
LPM_WIDTH
10
PARAMETER_SIGNED_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
shiftin
-1
3
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
enable
-1
3
clock
-1
3
aclr
-1
3
}
# include_file {
e:|altera|c72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|c72|quartus|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
e:|altera|c72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
}
# lmf
e:|altera|c72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
lpm_decode
# storage
db|ad0809.(37).cnf
db|ad0809.(37).cnf
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|lpm_decode.tdf
e54fe7084974ccb962d679caa84bdd
6
# user_parameter {
LPM_WIDTH
3
PARAMETER_SIGNED_DEC
USR
LPM_DECODES
8
PARAMETER_SIGNED_DEC
USR
LPM_PIPELINE
1
PARAMETER_SIGNED_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_aoi
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
eq7
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# include_file {
e:|altera|c72|quartus|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
e:|altera|c72|quartus|libraries|megafunctions|aglobal72.inc
f39123b8592ab2dac019716e56b3ec18
e:|altera|c72|quartus|libraries|megafunctions|altshift.inc
70fa13aee7d6d160ef20b2de32813a
e:|altera|c72|quartus|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
e:|altera|c72|quartus|libraries|megafunctions|declut.inc
b1d5939399e5c04dfe1d209af8cc490
}
# lmf
e:|altera|c72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
decode_aoi
# storage
db|ad0809.(38).cnf
db|ad0809.(38).cnf
# case_insensitive
# source_file
db|decode_aoi.tdf
27acb647f9c1d82ff6f81bf65afeb
6
# used_port {
eq7
-1
3
eq6
-1
3
eq5
-1
3
eq4
-1
3
eq3
-1
3
eq2
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
clock
-1
3
clken
-1
3
aclr
-1
3
}
# lmf
e:|altera|c72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
sld_dffex
# storage
db|ad0809.(39).cnf
db|ad0809.(39).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
1
PARAMETER_SIGNED_DEC
USR
 constraint(d)
0 downto 0
PARAMETER_STRING
USR
 constraint(q)
0 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_dffex
# storage
db|ad0809.(40).cnf
db|ad0809.(40).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
9
PARAMETER_SIGNED_DEC
USR
 constraint(d)
8 downto 0
PARAMETER_STRING
USR
 constraint(q)
8 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_dffex
# storage
db|ad0809.(41).cnf
db|ad0809.(41).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_dffex.vhd
e07a659f3de75fb323a077607414df48
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
size
8
PARAMETER_SIGNED_DEC
USR
 constraint(d)
7 downto 0
PARAMETER_STRING
USR
 constraint(q)
7 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_rom_sr
# storage
db|ad0809.(42).cnf
db|ad0809.(42).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_rom_sr.vhd
289c5d86b3cfff8b4a53596c88b2f9be
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
n_bits
64
PARAMETER_SIGNED_DEC
USR
word_size
4
PARAMETER_SIGNED_DEC
USR
 constraint(rom_data)
63 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap
# storage
db|ad0809.(43).cnf
db|ad0809.(43).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
lpm_type
sld_signaltap
PARAMETER_STRING
DEF
sld_node_info
805334528
PARAMETER_UNKNOWN
USR
sld_ip_version
6
PARAMETER_SIGNED_DEC
DEF
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
DEF
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
DEF
sld_data_bits
12
PARAMETER_UNKNOWN
USR
sld_trigger_bits
12
PARAMETER_UNKNOWN
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
DEF
sld_node_crc_hiword
43791
PARAMETER_UNKNOWN
USR
sld_node_crc_loword
25378
PARAMETER_UNKNOWN
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
DEF
sld_sample_depth
128
PARAMETER_UNKNOWN
USR
sld_segment_size
128
PARAMETER_UNKNOWN
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
DEF
sld_state_bits
11
PARAMETER_UNKNOWN
USR
sld_buffer_full_stop
1
PARAMETER_UNKNOWN
USR
sld_mem_address_bits
7
PARAMETER_SIGNED_DEC
DEF
sld_data_bit_cntr_bits
4
PARAMETER_SIGNED_DEC
DEF
sld_trigger_level
1
PARAMETER_UNKNOWN
USR
sld_trigger_in_enabled
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_UNKNOWN
USR
sld_trigger_level_pipeline
1
PARAMETER_UNKNOWN
USR
sld_enable_advanced_trigger
0
PARAMETER_UNKNOWN
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_2
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_3
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_4
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_5
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_6
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_7
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_8
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_9
NONE
PARAMETER_STRING
DEF
sld_advanced_trigger_10
NONE
PARAMETER_STRING
DEF
sld_inversion_mask_length
57
PARAMETER_UNKNOWN
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000
PARAMETER_UNKNOWN
USR
sld_power_up_trigger
0
PARAMETER_UNKNOWN
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
DEF
sld_state_flow_use_generated
0
PARAMETER_UNKNOWN
USR
sld_current_resource_width
1
PARAMETER_UNKNOWN
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_signaltap_impl
# storage
db|ad0809.(44).cnf
db|ad0809.(44).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
sld_ip_version
6
PARAMETER_SIGNED_DEC
USR
sld_ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
sld_common_ip_version
0
PARAMETER_SIGNED_DEC
USR
sld_data_bits
12
PARAMETER_SIGNED_DEC
USR
sld_trigger_bits
12
PARAMETER_SIGNED_DEC
USR
sld_node_crc_bits
32
PARAMETER_SIGNED_DEC
USR
sld_node_crc_hiword
43791
PARAMETER_SIGNED_DEC
USR
sld_node_crc_loword
25378
PARAMETER_SIGNED_DEC
USR
sld_incremental_routing
0
PARAMETER_SIGNED_DEC
USR
sld_sample_depth
128
PARAMETER_SIGNED_DEC
USR
sld_segment_size
128
PARAMETER_SIGNED_DEC
USR
sld_ram_block_type
AUTO
PARAMETER_STRING
USR
sld_state_bits
11
PARAMETER_SIGNED_DEC
USR
sld_buffer_full_stop
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_level
1
PARAMETER_SIGNED_DEC
USR
sld_trigger_in_enabled
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
sld_trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
sld_enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_advanced_trigger_1
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_2
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_3
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_4
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_5
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_6
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_7
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_8
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_9
NONE
PARAMETER_STRING
USR
sld_advanced_trigger_10
NONE
PARAMETER_STRING
USR
sld_inversion_mask_length
57
PARAMETER_SIGNED_DEC
USR
sld_inversion_mask
000000000000000000000000000000000000000000000000000000000
PARAMETER_UNSIGNED_BIN
USR
sld_power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
sld_state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
sld_state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
sld_current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_data_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(crc)
31 downto 0
PARAMETER_STRING
USR
 constraint(ir_in)
7 downto 0
PARAMETER_STRING
USR
 constraint(ir_out)
7 downto 0
PARAMETER_STRING
USR
 constraint(acq_data_out)
11 downto 0
PARAMETER_STRING
USR
 constraint(acq_trigger_out)
11 downto 0
PARAMETER_STRING
USR
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
sld_ela_control
# storage
db|ad0809.(45).cnf
db|ad0809.(45).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
e:|altera|c72|quartus|libraries|megafunctions|sld_ela_control.vhd
379053defbf40b1646b2e185915e97e
4
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# user_parameter {
ip_major_version
6
PARAMETER_SIGNED_DEC
USR
ip_minor_version
0
PARAMETER_SIGNED_DEC
USR
common_ip_version
0
PARAMETER_SIGNED_DEC
USR
trigger_input_width
12
PARAMETER_SIGNED_DEC
USR
trigger_level
1
PARAMETER_SIGNED_DEC
USR
trigger_in_enabled
0
PARAMETER_SIGNED_DEC
USR
advanced_trigger_entity
basic,1,
PARAMETER_STRING
USR
enable_advanced_trigger
0
PARAMETER_SIGNED_DEC
USR
trigger_level_pipeline
1
PARAMETER_SIGNED_DEC
USR
ela_status_bits
4
PARAMETER_SIGNED_DEC
USR
mem_address_bits
7
PARAMETER_SIGNED_DEC
USR
sample_depth
128
PARAMETER_SIGNED_DEC
USR
inversion_mask_length
1
PARAMETER_SIGNED_DEC
USR
inversion_mask
0
PARAMETER_UNSIGNED_BIN
USR
power_up_trigger
0
PARAMETER_SIGNED_DEC
USR
state_bits
11
PARAMETER_SIGNED_DEC
USR
segment_size_bits
7
PARAMETER_SIGNED_DEC
USR
state_flow_mgr_entity
state_flow_mgr_entity.vhd
PARAMETER_STRING
USR
state_flow_use_generated
0
PARAMETER_SIGNED_DEC
USR
current_resource_width
1
PARAMETER_SIGNED_DEC
USR
 constraint(acq_trigger_in)
11 downto 0
PARAMETER_STRING
USR
 constraint(post_fill_count)
6 downto 0
PARAMETER_STRING
USR
 constraint(current_state)
10 downto 0
PARAMETER_STRING
USR
 constraint(trigger_out_mode)
0 downto 0
PARAMETER_STRING
USR
 constraint(current_resource_value)
0 downto 0
PARAMETER_STRING
USR
}
# include_file {
e:|altera|c72|quartus|libraries|megafunctions|sld_signaltap.vhd
cbaf56d055292b12371d5b457d2fcf
}
# lmf
e:|altera|c72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity