dispdecoder.map.eqn

verilog写的数字频率计的显示模块,可以

--A1L13 is always1~187
A1L13_p1_out = dp_s10hz & disp_select[1] & !disp_select[2] & disp_select[0];
A1L13_p2_out = !disp_select[1] & disp_select[2] & disp_select[0] & dp_s1hz;
A1L13_p3_out = !disp_select[1] & !disp_select[2] & disp_select[0] & dp_s100hz;
A1L13_or_out = A1L13_p1_out # A1L13_p2_out # A1L13_p3_out;
A1L13 = A1L13_or_out;


--A1L57 is reduce_or~1056
A1L57_p1_out = data_in[2] & !data_in[1] & !data_in[3];
A1L57_p2_out = data_in[2] & !data_in[3] & !data_in[0];
A1L57_p3_out = !data_in[2] & data_in[1] & !data_in[3];
A1L57_p4_out = !data_in[2] & !data_in[1] & data_in[3];
A1L57_or_out = A1L57_p1_out # A1L57_p2_out # A1L57_p3_out # A1L57_p4_out;
A1L57 = A1L57_or_out;


--A1L16 is hide~363
A1L16_p0_out = !disp_select[1] & !disp_select[0] & !counter_out & !Q5[3] & !Q5[2] & !Q5[1] & !Q5[0] & !dp_s100hz & !Q4[3] & !Q4[2] & !Q4[1] & !Q4[0] & !Q3[3] & !Q3[2] & !Q3[1] & !Q3[0] & !dp_s10hz & !Q2[0] & !Q2[1] & !Q2[2] & !Q2[3] & !Q1[3] & !Q1[2] & !Q1[1] & !Q1[0];
A1L16_p1_out = !disp_select[2] & !disp_select[1] & !disp_select[0] & !counter_out & !Q5[3] & !Q5[2] & !Q5[1] & !Q5[0];
A1L16_p2_out = !disp_select[2] & !disp_select[1] & !counter_out & !Q5[3] & !Q5[2] & !Q5[1] & !Q5[0] & !dp_s100hz & !Q4[3] & !Q4[2] & !Q4[1] & !Q4[0];
A1L16_p3_out = !disp_select[2] & !disp_select[0] & !counter_out & !Q5[3] & !Q5[2] & !Q5[1] & !Q5[0] & !dp_s100hz & !Q4[3] & !Q4[2] & !Q4[1] & !Q4[0] & !Q3[3] & !Q3[2] & !Q3[1] & !Q3[0];
A1L16_p4_out = !disp_select[2] & !counter_out & !Q5[3] & !Q5[2] & !Q5[1] & !Q5[0] & !dp_s100hz & !Q4[3] & !Q4[2] & !Q4[1] & !Q4[0] & !Q3[3] & !Q3[2] & !Q3[1] & !Q3[0] & !dp_s10hz & !Q2[0] & !Q2[1] & !Q2[2] & !Q2[3];
A1L16_or_out = A1L16_p0_out # A1L16_p1_out # A1L16_p2_out # A1L16_p3_out # A1L16_p4_out;
A1L16 = A1L16_or_out;


--A1L25 is data_out[6]$latch~10
A1L25_p1_out = !A1L16 & A1L07 & A1L66 & A1L26 & A1L36;
A1L25_p2_out = A1L16 & A1L25;
A1L25_p3_out = A1L25 & A1L07 & A1L66 & A1L26 & A1L36;
A1L25_or_out = A1L25_p1_out # A1L25_p2_out # A1L25_p3_out;
A1L25 = A1L25_or_out;


--A1L05 is data_out[5]$latch~10
A1L05_p1_out = !A1L16 & A1L07 & A1L66 & A1L46 & A1L56;
A1L05_p2_out = A1L16 & A1L05;
A1L05_p3_out = A1L05 & A1L07 & A1L66 & A1L46 & A1L56;
A1L05_or_out = A1L05_p1_out # A1L05_p2_out # A1L05_p3_out;
A1L05 = A1L05_or_out;


--A1L84 is data_out[4]$latch~10
A1L84_p1_out = !A1L16 & A1L07 & A1L66 & A1L76;
A1L84_p2_out = A1L16 & A1L84;
A1L84_p3_out = A1L84 & A1L07 & A1L66 & A1L76;
A1L84_or_out = A1L84_p1_out # A1L84_p2_out # A1L84_p3_out;
A1L84 = A1L84_or_out;


--A1L64 is data_out[3]$latch~10
A1L64_p1_out = !A1L16 & A1L07 & A1L86 & A1L36 & A1L66 & A1L96;
A1L64_p2_out = A1L16 & A1L64;
A1L64_p3_out = A1L64 & A1L07 & A1L86 & A1L36 & A1L66 & A1L96;
A1L64_or_out = A1L64_p1_out # A1L64_p2_out # A1L64_p3_out;
A1L64 = A1L64_or_out;


--A1L44 is data_out[2]$latch~10
A1L44_p1_out = !A1L16 & A1L07 & A1L17 & !data_in[0];
A1L44_p2_out = A1L16 & A1L44;
A1L44_p3_out = A1L44 & A1L07 & A1L17 & !data_in[0];
A1L44_or_out = A1L44_p1_out # A1L44_p2_out # A1L44_p3_out;
A1L44 = A1L44_or_out;


--A1L24 is data_out[1]$latch~10
A1L24_p1_out = !A1L16 & A1L27 & A1L66 & A1L37 & A1L47;
A1L24_p2_out = A1L16 & A1L24;
A1L24_p3_out = A1L24 & A1L27 & A1L66 & A1L37 & A1L47;
A1L24_or_out = A1L24_p1_out # A1L24_p2_out # A1L24_p3_out;
A1L24 = A1L24_or_out;


--A1L04 is data_out[0]$latch~10
A1L04_p1_out = A1L57 & !A1L16;
A1L04_p2_out = A1L16 & A1L04;
A1L04_p3_out = A1L57 & A1L04;
A1L04_or_out = A1L04_p1_out # A1L04_p2_out # A1L04_p3_out;
A1L04 = A1L04_or_out;


--A1L07 is reduce_or~1054sexp2
A1L07 = EXP(data_in[3] & data_in[1]);


--A1L17 is reduce_or~1054sexp3
A1L17 = EXP(!data_in[1] & data_in[2]);


--A1L66 is reduce_or~1052sexp2
A1L66 = EXP(data_in[3] & data_in[2]);


--A1L76 is reduce_or~1052sexp3
A1L76 = EXP(!data_in[2] & data_in[1] & !data_in[0]);


--A1L27 is reduce_or~1055sexp1
A1L27 = EXP(!data_in[3] & !data_in[2] & data_in[0]);


--A1L37 is reduce_or~1055sexp3
A1L37 = EXP(!data_in[2] & data_in[1]);


--A1L47 is reduce_or~1055sexp4
A1L47 = EXP(data_in[1] & data_in[0]);


--A1L26 is reduce_or~1050sexp3
A1L26 = EXP(!data_in[3] & !data_in[1] & !data_in[2] & data_in[0]);


--A1L36 is reduce_or~1050sexp4
A1L36 = EXP(!data_in[1] & data_in[2] & !data_in[0]);


--A1L46 is reduce_or~1051sexp3
A1L46 = EXP(data_in[2] & !data_in[1] & data_in[0]);


--A1L56 is reduce_or~1051sexp4
A1L56 = EXP(data_in[2] & data_in[1] & !data_in[0]);


--A1L86 is reduce_or~1053sexp2
A1L86 = EXP(!data_in[2] & !data_in[1] & data_in[0]);


--A1L96 is reduce_or~1053sexp5
A1L96 = EXP(data_in[2] & data_in[1] & data_in[0]);


--data_in[3] is data_in[3]
--operation mode is input

data_in[3] = INPUT();


--data_in[2] is data_in[2]
--operation mode is input

data_in[2] = INPUT();


--data_in[1] is data_in[1]
--operation mode is input

data_in[1] = INPUT();


--data_in[0] is data_in[0]
--operation mode is input

data_in[0] = INPUT();


--disp_select[2] is disp_select[2]
--operation mode is input

disp_select[2] = INPUT();


--disp_select[1] is disp_select[1]
--operation mode is input

disp_select[1] = INPUT();


--disp_select[0] is disp_select[0]
--operation mode is input

disp_select[0] = INPUT();


--dp_s1hz is dp_s1hz
--operation mode is input

dp_s1hz = INPUT();


--dp_s10hz is dp_s10hz
--operation mode is input

dp_s10hz = INPUT();


--dp_s100hz is dp_s100hz
--operation mode is input

dp_s100hz = INPUT();


--Q5[3] is Q5[3]
--operation mode is input

Q5[3] = INPUT();


--Q5[2] is Q5[2]
--operation mode is input

Q5[2] = INPUT();


--Q5[1] is Q5[1]
--operation mode is input

Q5[1] = INPUT();


--Q5[0] is Q5[0]
--operation mode is input

Q5[0] = INPUT();


--Q4[3] is Q4[3]
--operation mode is input

Q4[3] = INPUT();


--Q4[2] is Q4[2]
--operation mode is input

Q4[2] = INPUT();


--Q4[1] is Q4[1]
--operation mode is input

Q4[1] = INPUT();


--Q4[0] is Q4[0]
--operation mode is input

Q4[0] = INPUT();


--Q3[3] is Q3[3]
--operation mode is input

Q3[3] = INPUT();


--Q3[2] is Q3[2]
--operation mode is input

Q3[2] = INPUT();


--Q3[1] is Q3[1]
--operation mode is input

Q3[1] = INPUT();


--Q3[0] is Q3[0]
--operation mode is input

Q3[0] = INPUT();


--Q2[3] is Q2[3]
--operation mode is input

Q2[3] = INPUT();


--Q2[2] is Q2[2]
--operation mode is input

Q2[2] = INPUT();


--Q2[1] is Q2[1]
--operation mode is input

Q2[1] = INPUT();


--Q2[0] is Q2[0]
--operation mode is input

Q2[0] = INPUT();


--Q1[3] is Q1[3]
--operation mode is input

Q1[3] = INPUT();


--Q1[2] is Q1[2]
--operation mode is input

Q1[2] = INPUT();


--Q1[1] is Q1[1]
--operation mode is input

Q1[1] = INPUT();


--Q1[0] is Q1[0]
--operation mode is input

Q1[0] = INPUT();


--Q0[3] is Q0[3]
--operation mode is input

Q0[3] = INPUT();


--Q0[2] is Q0[2]
--operation mode is input

Q0[2] = INPUT();


--Q0[1] is Q0[1]
--operation mode is input

Q0[1] = INPUT();


--Q0[0] is Q0[0]
--operation mode is input

Q0[0] = INPUT();


--counter_out is counter_out
--operation mode is input

counter_out = INPUT();


--dp is dp
--operation mode is output

dp = OUTPUT(A1L13);


--data_out[6] is data_out[6]
--operation mode is output

data_out[6] = OUTPUT(A1L25);


--data_out[5] is data_out[5]
--operation mode is output

data_out[5] = OUTPUT(A1L05);


--data_out[4] is data_out[4]
--operation mode is output

data_out[4] = OUTPUT(A1L84);


--data_out[3] is data_out[3]
--operation mode is output

data_out[3] = OUTPUT(A1L64);


--data_out[2] is data_out[2]
--operation mode is output

data_out[2] = OUTPUT(A1L44);


--data_out[1] is data_out[1]
--operation mode is output

data_out[1] = OUTPUT(A1L24);


--data_out[0] is data_out[0]
--operation mode is output

data_out[0] = OUTPUT(A1L04);