detect_high.hier_info

利用FPGA实现频率测试,基于VHDL实现,具有良好的测试性能可直接使用

|detect_high
clk => high_time[0]~reg0.CLK
clk => high_time[1]~reg0.CLK
clk => high_time[2]~reg0.CLK
clk => high_time[3]~reg0.CLK
clk => high_time[4]~reg0.CLK
clk => high_time[5]~reg0.CLK
clk => high_time[6]~reg0.CLK
clk => high_time[7]~reg0.CLK
clk => high_time[8]~reg0.CLK
clk => high_time[9]~reg0.CLK
clk => high_time[10]~reg0.CLK
clk => high_time[11]~reg0.CLK
clk => high_time[12]~reg0.CLK
clk => high_time[13]~reg0.CLK
clk => high_time[14]~reg0.CLK
clk => high_time[15]~reg0.CLK
clk => high_time[16]~reg0.CLK
clk => high_time[17]~reg0.CLK
clk => high_time[18]~reg0.CLK
clk => high_time[19]~reg0.CLK
clk => high_time[20]~reg0.CLK
clk => high_time[21]~reg0.CLK
clk => high_time[22]~reg0.CLK
clk => high_time[23]~reg0.CLK
clk => high_time[24]~reg0.CLK
clk => high_time[25]~reg0.CLK
clk => high_time[26]~reg0.CLK
clk => enable_buf.CLK
clk => count_int[0].CLK
clk => count_int[1].CLK
clk => count_int[2].CLK
clk => count_int[3].CLK
clk => count_int[4].CLK
clk => count_int[5].CLK
clk => count_int[6].CLK
clk => count_int[7].CLK
clk => count_int[8].CLK
clk => count_int[9].CLK
clk => count_int[10].CLK
clk => count_int[11].CLK
clk => count_int[12].CLK
clk => count_int[13].CLK
clk => count_int[14].CLK
clk => count_int[15].CLK
clk => count_int[16].CLK
clk => count_int[17].CLK
clk => count_int[18].CLK
clk => count_int[19].CLK
clk => count_int[20].CLK
clk => count_int[21].CLK
clk => count_int[22].CLK
clk => count_int[23].CLK
clk => count_int[24].CLK
clk => count_int[25].CLK
clk => count_int[26].CLK
reset => count_int~27.OUTPUTSELECT
reset => count_int~28.OUTPUTSELECT
reset => count_int~29.OUTPUTSELECT
reset => count_int~30.OUTPUTSELECT
reset => count_int~31.OUTPUTSELECT
reset => count_int~32.OUTPUTSELECT
reset => count_int~33.OUTPUTSELECT
reset => count_int~34.OUTPUTSELECT
reset => count_int~35.OUTPUTSELECT
reset => count_int~36.OUTPUTSELECT
reset => count_int~37.OUTPUTSELECT
reset => count_int~38.OUTPUTSELECT
reset => count_int~39.OUTPUTSELECT
reset => count_int~40.OUTPUTSELECT
reset => count_int~41.OUTPUTSELECT
reset => count_int~42.OUTPUTSELECT
reset => count_int~43.OUTPUTSELECT
reset => count_int~44.OUTPUTSELECT
reset => count_int~45.OUTPUTSELECT
reset => count_int~46.OUTPUTSELECT
reset => count_int~47.OUTPUTSELECT
reset => count_int~48.OUTPUTSELECT
reset => count_int~49.OUTPUTSELECT
reset => count_int~50.OUTPUTSELECT
reset => count_int~51.OUTPUTSELECT
reset => count_int~52.OUTPUTSELECT
reset => count_int~53.OUTPUTSELECT
reset => high_time~27.OUTPUTSELECT
reset => high_time~28.OUTPUTSELECT
reset => high_time~29.OUTPUTSELECT
reset => high_time~30.OUTPUTSELECT
reset => high_time~31.OUTPUTSELECT
reset => high_time~32.OUTPUTSELECT
reset => high_time~33.OUTPUTSELECT
reset => high_time~34.OUTPUTSELECT
reset => high_time~35.OUTPUTSELECT
reset => high_time~36.OUTPUTSELECT
reset => high_time~37.OUTPUTSELECT
reset => high_time~38.OUTPUTSELECT
reset => high_time~39.OUTPUTSELECT
reset => high_time~40.OUTPUTSELECT
reset => high_time~41.OUTPUTSELECT
reset => high_time~42.OUTPUTSELECT
reset => high_time~43.OUTPUTSELECT
reset => high_time~44.OUTPUTSELECT
reset => high_time~45.OUTPUTSELECT
reset => high_time~46.OUTPUTSELECT
reset => high_time~47.OUTPUTSELECT
reset => high_time~48.OUTPUTSELECT
reset => high_time~49.OUTPUTSELECT
reset => high_time~50.OUTPUTSELECT
reset => high_time~51.OUTPUTSELECT
reset => high_time~52.OUTPUTSELECT
reset => high_time~53.OUTPUTSELECT
enable => enable_buf.DATAIN
enable => count_int~0.OUTPUTSELECT
enable => count_int~1.OUTPUTSELECT
enable => count_int~2.OUTPUTSELECT
enable => count_int~3.OUTPUTSELECT
enable => count_int~4.OUTPUTSELECT
enable => count_int~5.OUTPUTSELECT
enable => count_int~6.OUTPUTSELECT
enable => count_int~7.OUTPUTSELECT
enable => count_int~8.OUTPUTSELECT
enable => count_int~9.OUTPUTSELECT
enable => count_int~10.OUTPUTSELECT
enable => count_int~11.OUTPUTSELECT
enable => count_int~12.OUTPUTSELECT
enable => count_int~13.OUTPUTSELECT
enable => count_int~14.OUTPUTSELECT
enable => count_int~15.OUTPUTSELECT
enable => count_int~16.OUTPUTSELECT
enable => count_int~17.OUTPUTSELECT
enable => count_int~18.OUTPUTSELECT
enable => count_int~19.OUTPUTSELECT
enable => count_int~20.OUTPUTSELECT
enable => count_int~21.OUTPUTSELECT
enable => count_int~22.OUTPUTSELECT
enable => count_int~23.OUTPUTSELECT
enable => count_int~24.OUTPUTSELECT
enable => count_int~25.OUTPUTSELECT
enable => count_int~26.OUTPUTSELECT
enable => process2~0.IN1
high_time[0] <= high_time[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[1] <= high_time[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[2] <= high_time[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[3] <= high_time[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[4] <= high_time[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[5] <= high_time[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[6] <= high_time[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[7] <= high_time[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[8] <= high_time[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[9] <= high_time[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[10] <= high_time[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[11] <= high_time[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[12] <= high_time[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[13] <= high_time[13]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[14] <= high_time[14]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[15] <= high_time[15]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[16] <= high_time[16]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[17] <= high_time[17]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[18] <= high_time[18]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[19] <= high_time[19]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[20] <= high_time[20]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[21] <= high_time[21]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[22] <= high_time[22]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[23] <= high_time[23]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[24] <= high_time[24]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[25] <= high_time[25]~reg0.DB_MAX_OUTPUT_PORT_TYPE
high_time[26] <= high_time[26]~reg0.DB_MAX_OUTPUT_PORT_TYPE